[time-nuts] Looking for ECL divide by 3 with symmetry

[ed breya]

I need to build an ECL divide by 3 circuit to run at about 50 MHz input. 
I know there are lots of examples out there, but I vaguely recall years 
ago I stumbled upon one or more that also provided more of a symmetrical 
output nearly 50 percent duty factor, by using both input edges, or 
reclocking with another FF. I saved the info, but of course can't find 
it now that I need it - in my computers, papers, or online. Does anyone 
know of these tricks, and any example circuits - this would save me some 
rediscovery and design time.

Ed
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