Hi Poul, Your comment about on-chip PLLs got me to wondering about the dsPIC33FJ128MC804 I'm using in my GPSDO. So, I put it on the 5370A to see what's up. Input to the gate port is the drive signal for an LED that I flash at 1PPS (controlled by an on-chip timer). I delay that with a 10ft piece of RG-58 to drive the start gate. The stop gate is driven by the OCXO output from the GPSDO. Internally, the chip's PLL is running at 160MHz (10MHz OCXO / 2 * 32), which is divided down to 80MHz for FOSC and then by 2 again for FCY, if you know these dsPICs.
The ADEV at 1s is about 1.7E-10, declining at about a decade per decade. I take this to represent the jitter of the PIC's onboard RC oscillator as driven by the OCXO. Bob -------------------------------------------- On Wed, 1/20/16, Poul-Henning Kamp <[email protected]> wrote: Subject: Re: [time-nuts] Generating a solid PPS from 10Mhz source To: "Discussion of precise time and frequency measurement" <[email protected]>, "Attila Kinali" <[email protected]> Date: Wednesday, January 20, 2016, 8:13 AM -------- In message <[email protected]>, Attila Kinali w rites: >The test results showed a quite more >detailed structure with few delays over 100ps and most being between >20ps and 80ps. Interestingly, some were close to 0ps, for which >we have no explanation good explanation. Any on-chip PLL's with "spread-spectrum" to fudge EMI tests ? -- Poul-Henning Kamp | UNIX _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
