[email protected] said: > except that virtually every UART in use today has some sort of buffering > (whether a FIFO or double buffering) between the CPU interface and the bits > on the wire, which completely desynchronizes the bits on the wire from the > CPU interface.
The idea was to reduce the CPU load processing interrupts by batching things up. Some of those chips generate an interrupt when the see a return or line-feed character. Most of them have an option to disable that batching. On Linux the setserial command has a low_latency option. I haven't measured the difference. It would be a fun experiment. -- These are my opinions. I hate spam. _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
