On Sun, Jul 9, 2017 at 2:15 AM, Mark Sims <hol...@hotmail.com> wrote:
> > So far my design is tending towards: 10MHz ref input -> Minicircuits doubler > -> Wenzel squarer -> 74AC74 divider -> 74AC04 buffer -> level shifter. The > doubler/divider might not be needed, but I think it will give a more > symmetric output. I might include a space for a 10 MHz TTL oscillator for > non time-nut users... hopefully it might be stable enough over the short time > interval for a cal measurement cycle. once upon a time, I was experimenting with digital signals to derive stable RF transverter LOs. I've "found" that feeding a XOR gate with a signal and his replica delayed by 2 inverters did result in a crude frequency doubler (well it's rather an edge detector). Since I was going to use the double frequency just to drive a divider by two, the actual duty cycle out of the doubler didn't matter. HTH Frank _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
