Circa 1982: After the cancellation of the HP 10816 mini rubidium product, I worked on the 5183 "Waveform Recorder" (the name was a euphemism to deflect charter wars with the scope division which was just getting into digital scopes). I was tasked with designing a DRAM memory board, to replace the SRAM memory boards used previously. I designed a FIFO buffer to collect samples coming in during refresh intervals.
The samples came in a 4 MHz, but memory was clocked at 4.6 MHz, which I determined was sufficient to allow refreshing without an overflow. The data had to be resynched with the 4.6 MHz clock. Somehow I became aware of metastability, which was new to me, and unknown to most engineers at SCD. I designed a state machine running on a 32 MHz clock to resync 4 MHz clock edges. A number of engineers know just enough to be dangerous and suggested the technique is to just make a shift register and run the incoming edge through n flip flops. "Everyone knew" that was the thing to do. NOT. Actually, I only had to reclock 2 times, but the delay between the two registers had to be MUCH longer than the 31 ns period of the 32 MHz clock. I characterized the flip flops I was using to make a probability curve of metastability events per year vs delay time using a special fixturing board. I ended up choosing a time delay that extrapolated to something like 1 event in 10 years, just about "never". In those days, 32 MHz clocking was considered very high speed for the available TTL logic. I authored my very first patent covering the DRAM system. If interested, search on my name for inventor and go to the oldest listing, early 1980's. Later in the project we had a problem where about once a day, the HPIB chip would hang. I built a special triggering circuit to catch it in the act and capture the smoking gun on the logic analyzer. The smoking gun was that the bus would go into "serial poll" mode, which it should "never" have done. The general concensus was that this was caused by metastability in the "PHI" chip as it was called. I don't remember the fix, maybe something like a watch dog that would use my trigger to just clear the error. You'd get a daily corrupted measurement, but at least it wouldn't hang. Rick N6RK On 1/20/2019 10:10 PM, Hal Murray wrote:
When did people designing counter/timers start paying attention to metastability? I learned about it in the late 70s or early 80s. In the mid 80s, I went to a trade show that had a panel on it, and one of the panelists actually claimed it wasn't a problem.
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