Hi Rick,
On 2019-01-21 16:31, Richard (Rick) Karlquist wrote:
I designed a state machine running on a 32 MHz clock
to resync 4 MHz clock edges. A number of engineers
know just enough to be dangerous and suggested the
technique is to just make a shift register and run
the incoming edge through n flip flops. "Everyone knew" that
was the thing to do. NOT. Actually, I only had to
reclock 2 times, but the delay between the two registers
had to be MUCH longer than the 31 ns period of the
32 MHz clock. I characterized the flip flops I
was using to make a probability curve of metastability
events per year vs delay time using a special fixturing
board. I ended up choosing a time delay that extrapolated
to something like 1 event in 10 years, just about "never".
In those days, 32 MHz clocking was considered very high
speed for the available TTL logic.
Today as we design these things, the same basic "cure" is used in order
to handle meta-stability. We re-clock 2 times, but often the data can be
hand-shaked over the clock domain border so only a few lines is needed
in each direction to be double-clocked. As we build modern designs,
clock domain borders is a pain, but a known pain and it just needs
enough learning to handle it. Often we try to keep most of the logic in
one or a few core domains. The basic problem is as valid as back then.
Over the years the practical way to solve it has changed with available
technologies. Even in modern FPGA times it can cause... interesting
problems. All the Register-Transfer-Logic type of the design is well
confined, but clock-domain borders always remain "interesting".
Dual-port memories or FIFOs tolerating clock domains shifts only solve
"so much" it turns out.
Even when operating synchronously madness can hit, for sure. Those
experience include issues with Signal Integrity problems.
The real morale of these stories is that it actually takes a lot of
effort to make digital designs... behave digitally and robust. It is
however worth the effort.
Meta-stability is never fully "solved", but sufficiently surpressed.
This is just as with bit-errors, which we never really get rid of, just
move them out of sufficiently often to be annoying.
Cheers,
Magnus
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