time-nuts Digest, Vol 216, Issue 5 Multiple responses interspersed below.
> ---------------------------------------------------------------------- > > Message: 1 > Date: Sun, 3 Apr 2022 10:13:44 +0200 > From: "Bernd Neubig" <bneu...@t-online.de> > Subject: [time-nuts] Re: Low Phase Noise 10 MHz bench signal source > sought > To: "'Discussion of precise time and frequency measurement'" > <time-nuts@lists.febo.com> > Message-ID: <003a01d84732$bcc47c40$364d74c0$@t-online.de> > Content-Type: text/plain; charset="utf-8" > > Hi, > > This is nearly "off-the shelf" model: > https://www.axtal.com/cms/docs/doc100916.pdf > The ULN version does meet the -170 dBc/Hz This unit is certainly plausible. > ------------------------------ > > Message: 4 > Date: Sun, 3 Apr 2022 09:53:18 -0400 > From: Bob kb8tq <kb...@n1k.org> > Subject: [time-nuts] Re: Low Phase Noise 10 MHz bench signal source > sought > To: ew <ewkeh...@aol.com>, Discussion of precise time and frequency > measurement <time-nuts@lists.febo.com> > Message-ID: <11376923-062a-4011-a6d4-1d9ce3361...@n1k.org> > Content-Type: text/plain; charset=utf-8 > > Hi > > These days a PLL is going to either be analog or digital. If it’s > analog, you get into size constraints related to capacitors > as you go to lower crossover frequencies. With digital, you > get into all of the noise issues that any digital circuit will have. > (Yes, they can be addressed but it’s not easy at very low > offset frequencies). All of the loop filters I've seen recently had nominal bandwidths in the Hertz to tens of Hertz, usually implemented in some kind of digital signal processor. About 30 years ago, there was a legacy 5 MHz disciplined oscillator that could be set to a 100-second response time. I never did find any real technical data or patents on it. I don't recall its name, but it may come back to me. I think it was made by Symmetricom. > Regardless of design, you will always have some noise peaking. > > 89 degree phase margins can help with this, but they bring > in other problems. Setting the phase margin and other parameters > is either a mathematical design process or done with simulation. > It can be very frustrating doing it by trial and error. I still find > Phaselock Techniques by Floyd M Gardner to be a good reference > on this stuff. > > The normal PLL control loops are fairly low order filters. If you > go high order, loop stability (and peaking) becomes difficult > to handle. Because it’s a simple filter, things like close in spurs > will only be attenuated by some finite amount. I always suspected that that legacy disciplined oscillator used a 3rd-order PLL loop, because it became unstable if the incoming reference signal was too faint. But that filter had to be their secret sauce. Joe Gwinn > So yes, you will have issues. Dealing with those issues means > an area ( = range of offset frequencies) that are not as nice as you > might wish. That’s just the way the real world works. > > Bob > >> On Apr 3, 2022, at 8:14 AM, ew via time-nuts >> <time-nuts@lists.febo.com> wrote: >> >> There is a lot of talk of Rb's and OCXO's and using an OCXO for >> clean up. Very little about the clean up loop. It is key for >> overall performance. We are working on it for quite some time and >> are not happy with the results. On list off list would greatly be >> appreciated. >> Bert Kehren > > ------------------------------ _______________________________________________ time-nuts mailing list -- time-nuts@lists.febo.com -- To unsubscribe send an email to time-nuts-le...@lists.febo.com To unsubscribe, go to and follow the instructions there.