On 09.04.22 15:31, Richard (Rick) Karlquist wrote:
I am seeing a lot of unsupported "theories" about what should be done to
make devices with low 1/f noise. It might be instructive for everyone
to read Marv Keshner's PhD dissertation (Stanford) discussing 1/f noise.
He looks at all kinds of theories and shows that there is no valid
cookbook for how to make low 1/f noise devices. It's the classic
non reproducible process. I remember an FCS
talk many years ago that NIST guru Fred Walls gave with some theory
on how to get low 1/f noise. Unlike his other papers which were
well received (and rightly so), this one was rapidly debunked.
I felt bad for Fred, getting out too far over his skills.
Thanks for the hint towards the thesis, I'll ask our library to fetch a
copy.
Recently I was discussing some measurement results with my colleagues as
we're trying to come up with a low noise JFET which can successfully be
integrated into a SiGe BiCMOS process, and quite often we're also
struggling to identify why exactly variant A has significantly lower
noise than variant B, or why a new approach does not improve noise the
way it was expected.
So from a manufacturing process design point of view, achieving low 1/f
noise indeed is closer to sheer dumb luck than the proverbial "more art
than science" suggest.
Florian, DH7FET
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