Am 2022-04-09 20:35, schrieb Lux, Jim:
On 4/9/22 10:03 AM, [email protected] wrote:
On 09.04.22 15:31, Richard (Rick) Karlquist wrote:
I am seeing a lot of unsupported "theories" about what should be done
to make devices with low 1/f noise. It might be instructive for
everyone
to read Marv Keshner's PhD dissertation (Stanford) discussing 1/f
noise.
He looks at all kinds of theories and shows that there is no valid
cookbook for how to make low 1/f noise devices. It's the classic
non reproducible process. I remember an FCS
talk many years ago that NIST guru Fred Walls gave with some theory
on how to get low 1/f noise. Unlike his other papers which were
well received (and rightly so), this one was rapidly debunked.
I felt bad for Fred, getting out too far over his skills.
Thanks for the hint towards the thesis, I'll ask our library to fetch
a copy.
Recently I was discussing some measurement results with my colleagues
as we're trying to come up with a low noise JFET which can
successfully be integrated into a SiGe BiCMOS process, and quite often
we're also struggling to identify why exactly variant A has
significantly lower noise than variant B, or why a new approach does
not improve noise the way it was expected.
So from a manufacturing process design point of view, achieving low
1/f noise indeed is closer to sheer dumb luck than the proverbial
"more art than science" suggest.
This is very, very true. Some manufacturers get very low noise or very
low leakage (or both), essentially by being "lucky". From what I've
been told, there's no good models, nor predictions - so people share
"lore" of "if you get these 2Nxxxx FETs from the mfr in England,
they're really good" until they aren't. There isn't enough market
for these, so I suspect research money to "solve the problem" isn't
available.
Buy a life time supply while they are available. One reel will probably
do.
Like all those microwave MMICs with low noise, they worry about 100
MHz and up (if not 1GHz), they certainly don't worry (or control) for
noise at 5 MHz, or where the 1/f knee is. So just because you got good
results with a batch of them, the next batch might not. It's not even
clear you could come up with a standardized test method, because the
noise depends on a lot of other factors (drain current, for instance).
When it changes from lot to lot, then you have lost. You cannot catch
that on the wafer tester. No one can pay for the tester time.
A simple BJT or FET circuit is allotted a ms or so in total, maybe.
You cannot measure 1/f in the 100 Hz range in that time. The picture
of the FET amplifier I had 3 days ago took 35 minutes, per trace.
By far, most of the wall time is aquisition time for the lowest octaves.
Setting the drain current is cheap, it takes maybe a dozen of test
vectors.
But tester time is paid in millions of vectors per second.
Gerhard
_______________________________________________
time-nuts mailing list -- [email protected] -- To unsubscribe send an
email to [email protected]
To unsubscribe, go to and follow the instructions there.
