Richard,
The PCB coating is silkscreened. Because it is a silkscreen, it is by its
very nature unreliable as an insulator. Silkscreening produces many voids
in the surface (air bubbles) and too much variation in coating thickness.
As a consequence it cannot be considered.
To be an viable insulator (in calculating creepage and clearance) coating must
be at least 2 layers of film (sheet or tape of Kapton.. etc). In the
opinion of many in the industry a silkscreen coating is too unreliable to
be considered.
Duane Marcroft
Telecom and Data Communications Consutant
___________________________________
>Doug,
>
>I accept the reasoning for a clearance when there are mounted
>components, but can we now consider areas on PCB's where there are NO
>components.
>See PCB cross sectional drawings below -
>
>Scenario A
>This is a representation of the 2nd paragraph of 2.9.5 lines 1 and 2.
>The coating will provide the necessary insulation so the separation
>distances can be reduced from those of tables 3, 4, 5 and 6.
>
>Scenario B
>This is a representation of the 2nd paragraph of 2.9.5 lines 2 and 3.
>Assume the following:
>Secondary Circuit
>Basic Insulation
>Working Voltage - 150 V r.m.s
>Transient rating - 1500V
>Pollution degree - 2
>Material group - IIIa
>
>The clearance distance given by Table 5 for the above is - 1.0mm
>
>The creepage distance given in Table 6 for the above is - 1.6mm
>
>Is it not possible that if the distance between the conductors was
>specificed from Table 5 that the creepage distance would be
>insufficient, given that a charge is more likely to travel across a
>surface (creepage) than through air (clearance)?
>
>Note 2 to Table 6 states "If the creepage distance derived from table 6
>is less than the applicable clearance from tables 3 and 4 or from 5, as
>appropriate, then the value for that clearance shall be applied as the
>value for the minimum creepage distance.
>This only happens when the CTI of the material is above 600 and the
>voltage is below 200V (for a 1500V transient).
>The CTI is not specified in 2.9.5, is it assumed that the CTI will be
>above 600 otherwise it won't pass the electric strength tests?
>
>I suspect that line 3 of the second paragraph should read "the distances
>in tables 3,4,5 and/or 6 apply".
>
>
>Regards
>
>Richard Steele
>Equipment Engineering Group
>Fujitsu Telecommunications Europe Limited
>
>
>Douglas Mckean wrote:
>>
>> When analyzing printed circuit boards, BOTH clearance AND creepage
>> are issues. The flat pcb fab (no parts installed or soldered) would
>> most likely have nothing but creepage issues - distances along
>> the surface of the board ("as the crow walks").
>>
>> An assembled pcb with parts that could compromise creepage
>> (parts laid down on the board for example or wires added
>> as a mod after assembly or maybe even a piggyback board)
>> would have clearance issues as well ("as the crow flies").
>>
>> Thus, the reason why both clearance and creepage are included
>> in all the IEC-950 based standards that I've seen: UL-1950,
>> EN-60950, ...
>>
>> Regards, Doug
>>
>
>Attachment converted: Marcroft Biz:xx165pdeengsaf.002.082.gif (GIFf/JVWR)
>(00003318)
