On Mon, Mar 17, 2008 at 06:02:29PM -0500, Scott Wood wrote:
> On Fri, Mar 14, 2008 at 11:19:42PM +0300, Anton Vorontsov wrote:
> > -#define CFG_VSC7385_BASE   0xF0000000
> > +/*
> > + * NAND Flash on the Local Bus
> > + */
> > +#define CFG_NAND_BASE              0xE0600000      /* 0xE0600000 */
> > +#define CFG_BR1_PRELIM             (CFG_NAND_BASE | \
> > +                            (2 << BR_DECC_SHIFT) | /* Use HW ECC */ \
> > +                            BR_PS_8 |              /* Port Size = 8 bit */ 
> > \
> > +                            BR_MS_FCM |            /* MSEL = FCM */ \
> > +                            BR_V)                  /* valid */
> > +#define CFG_OR1_PRELIM             (0xFFFF8000 |           /* length 32K 
> > */ \
> > +                            OR_FCM_CSCT | \
> > +                            OR_FCM_CST | \
> > +                            OR_FCM_CHT | \
> > +                            OR_FCM_SCY_1 | \
> > +                            OR_FCM_TRLX | \
> > +                            OR_FCM_EHTR)
> 
> Again, are you sure about this SCY value?

Yes. The same value is used by the MDS boards, with the same nand
chip, I guess.

> Note that the Linux driver resets
> it due to existing 8313 u-boots out there that have the wrong value (I'd
> send a patch to fix it if I know the correct value),

Thanks for the info.

> so remove that to see
> what actually happens with SCY_1.

It works. With ndelay writing works too. So far I didn't have
time to debug further, sorry.

> > -/* VSC7385 Gigabit Switch support */
> > +/*
> > + * VSC7385 Gigabit Switch support
> > + */
> > +#define CFG_VSC7385_BASE   0xF0000000
> 
> What does this have to do with NAND?

Nothing. I'm expanding VSC7385 comment to better separate it from
the NAND code. Most lengthy parts of the RDB config are using

/*
 *
 */

as a logical separator. So did I.

-- 
Anton Vorontsov
email: [EMAIL PROTECTED]
irc://irc.freenode.net/bd2

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