Stelian Pop a écrit :
Le lundi 07 avril 2008 à 16:14 +0200, Sander Vermin a écrit :
Did you test it as is ? From what I see in the code, the macb driver
doesn't care much about the PHY type...
I did test it, u-boot says no PHY present. I had to change from RMII
mode to MII mode due to my hardware design.
Ok, so there must be something else in the code which was changed to
support your PHY (look for some "isolate" setting like Eric said).
You'll need to find out what it is...
please find attached a quick and dirty hacked ks8721.c and the
corresponding .h
It works on an AT91RM9200 with u-boot 1.3.2.
Eric
/*
* (C) Copyright 2006
* Author : Eric Benard (Eukrea Electromatique)
* based on dm9161.c which is :
* (C) Copyright 2003
* Author : Hamid Ikdoumi (Atmel)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <at91rm9200_net.h>
#include <net.h>
#include <ks8721.h>
#ifdef CONFIG_DRIVER_ETHER
#if defined(CONFIG_CMD_NET)
#define PHY_ADDRESS (1<<5)
/*
* Name:
* ks8721_IsPhyConnected
* Description:
* Reads the 2 PHY ID registers
* Arguments:
* p_mac - pointer to AT91S_EMAC struct
* Return value:
* TRUE - if id read successfully
* FALSE- if error
*/
unsigned int ks8721_IsPhyConnected (AT91PS_EMAC p_mac)
{
unsigned short Id1, Id2;
unsigned short value;
at91rm9200_EmacEnableMDIO (p_mac);
at91rm9200_EmacReadPhy (p_mac, PHY_ADDRESS | KS8721_PHYID1, &Id1);
at91rm9200_EmacReadPhy (p_mac, PHY_ADDRESS | KS8721_PHYID2, &Id2);
at91rm9200_EmacDisableMDIO (p_mac);
if ((Id1 == (KS8721_PHYID1_OUI >> 6)) &&
((Id2 >> 10) == (KS8721_PHYID1_OUI & KS8721_LSB_MASK))) {
printf("Micrel KS8721 PHY detected : ");
/* Set ks8721 control register */
#if 0
if (!at91rm9200_EmacReadPhy (p_mac, PHY_ADDRESS | KS8721_BMCR, &value))
return FALSE;
value |= KS8721_AUTONEG; /* remove autonegotiation enable */
value &= ~KS8721_ISOLATE; /* Electrically isolate PHY */
value &= ~KS8721_POWER_DOWN; /* Electrically isolate PHY */
value &= ~KS8721_RESET; /* Electrically isolate PHY */
if (!at91rm9200_EmacWritePhy (p_mac, PHY_ADDRESS | KS8721_BMCR, &value))
return FALSE;
printf("BMCR = %x\n", value);
#endif //0
return TRUE;
}
return FALSE;
}
/*
* Name:
* ks8721_GetLinkSpeed
* Description:
* Link parallel detection status of MAC is checked and set in the
* MAC configuration registers
* Arguments:
* p_mac - pointer to MAC
* Return value:
* TRUE - if link status set succesfully
* FALSE - if link status not set
*/
UCHAR ks8721_GetLinkSpeed (AT91PS_EMAC p_mac)
{
unsigned short stat1, stat2;
if (!at91rm9200_EmacReadPhy (p_mac, KS8721_BMSR, &stat1))
return FALSE;
if (!(stat1 & KS8721_LINK_STATUS)) { /* link status up? */
printf("Link Down !\n");
return FALSE;
}
if (!at91rm9200_EmacReadPhy (p_mac, KS8721_DSCSR, &stat2))
return FALSE;
if ((stat1 & KS8721_100BASE_TX_FD) && (stat2 & KS8721_100FDX)) {
/*set Emac for 100BaseTX and Full Duplex */
printf("100BT FD\n");
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
return TRUE;
}
if ((stat1 & KS8721_10BASE_T_FD) && (stat2 & KS8721_10FDX)) {
/*set MII for 10BaseT and Full Duplex */
printf("10BT FD\n");
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_FD;
return TRUE;
}
if ((stat1 & KS8721_100BASE_T4_HD) && (stat2 & KS8721_100HDX)) {
/*set MII for 100BaseTX and Half Duplex */
printf("100BT HD\n");
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_SPD;
return TRUE;
}
if ((stat1 & KS8721_10BASE_T_HD) && (stat2 & KS8721_10HDX)) {
/*set MII for 10BaseT and Half Duplex */
printf("10BT HD\n");
p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
return TRUE;
}
return FALSE;
}
/*
* Name:
* ks8721_InitPhy
* Description:
* MAC starts checking its link by using parallel detection and
* Autonegotiation and the same is set in the MAC configuration registers
* Arguments:
* p_mac - pointer to struct AT91S_EMAC
* Return value:
* TRUE - if link status set succesfully
* FALSE - if link status not set
*/
UCHAR ks8721_InitPhy (AT91PS_EMAC p_mac)
{
UCHAR ret = TRUE;
unsigned short IntValue;
at91rm9200_EmacEnableMDIO (p_mac);
if (!ks8721_GetLinkSpeed (p_mac)) {
/* Try another time */
ret = ks8721_GetLinkSpeed (p_mac);
}
/* Disable PHY Interrupts */
at91rm9200_EmacReadPhy (p_mac, PHY_ADDRESS | KS8721_MDINTR, &IntValue);
/* set FDX, SPD, Link, INTR masks */
IntValue |= (KS8721_FDX_MASK | KS8721_SPD_MASK |
KS8721_LINK_MASK | KS8721_INTR_MASK);
at91rm9200_EmacWritePhy (p_mac, PHY_ADDRESS | KS8721_MDINTR, &IntValue);
at91rm9200_EmacDisableMDIO (p_mac);
return (ret);
}
/*
* Name:
* ks8721_AutoNegotiate
* Description:
* MAC Autonegotiates with the partner status of same is set in the
* MAC configuration registers
* Arguments:
* dev - pointer to struct net_device
* Return value:
* TRUE - if link status set successfully
* FALSE - if link status not set
*/
UCHAR ks8721_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
{
unsigned short value;
unsigned short PhyAnar;
unsigned short PhyAnalpar;
/* Set ks8721 control register */
if (!at91rm9200_EmacReadPhy (p_mac, PHY_ADDRESS | KS8721_BMCR, &value))
return FALSE;
value &= ~KS8721_AUTONEG; /* remove autonegotiation enable */
value |= KS8721_ISOLATE; /* Electrically isolate PHY */
if (!at91rm9200_EmacWritePhy (p_mac, PHY_ADDRESS | KS8721_BMCR, &value))
return FALSE;
/* Set the Auto_negotiation Advertisement Register */
/* MII advertising for Next page, 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */
PhyAnar = KS8721_NP | KS8721_TX_FDX | KS8721_TX_HDX |
KS8721_10_FDX | KS8721_10_HDX | KS8721_AN_IEEE_802_3;
if (!at91rm9200_EmacWritePhy (p_mac, PHY_ADDRESS | KS8721_ANAR, &PhyAnar))
return FALSE;
/* Read the Control Register */
if (!at91rm9200_EmacReadPhy (p_mac, PHY_ADDRESS | KS8721_BMCR, &value))
return FALSE;
value |= KS8721_SPEED_SELECT | KS8721_AUTONEG | KS8721_DUPLEX_MODE;
if (!at91rm9200_EmacWritePhy (p_mac, PHY_ADDRESS | KS8721_BMCR, &value))
return FALSE;
/* Restart Auto_negotiation */
value |= KS8721_RESTART_AUTONEG;
value &= ~KS8721_ISOLATE;
if (!at91rm9200_EmacWritePhy (p_mac, PHY_ADDRESS | KS8721_BMCR, &value))
return FALSE;
/*check AutoNegotiate complete */
udelay (10000);
at91rm9200_EmacReadPhy (p_mac, PHY_ADDRESS | KS8721_BMSR, &value);
if (!(value & KS8721_AUTONEG_COMP))
return FALSE;
/* Get the AutoNeg Link partner base page */
if (!at91rm9200_EmacReadPhy (p_mac, PHY_ADDRESS | KS8721_ANLPAR, &PhyAnalpar))
return FALSE;
if ((PhyAnar & KS8721_TX_FDX) && (PhyAnalpar & KS8721_TX_FDX)) {
/*set MII for 100BaseTX and Full Duplex */
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
return TRUE;
}
if ((PhyAnar & KS8721_10_FDX) && (PhyAnalpar & KS8721_10_FDX)) {
/*set MII for 10BaseT and Full Duplex */
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
| AT91C_EMAC_FD;
return TRUE;
}
return FALSE;
}
#endif /* CFG_CMD_NET */
#endif /* CONFIG_DRIVER_ETHER */
/*
* NOTE: DAVICOM ethernet Physical layer
*
* Version: KS8721.h
*
* Authors: Eric Benard ( based on dm9161.h
*
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
/* MICREL PHYSICAL LAYER TRANSCEIVER KS8721 */
#define KS8721_BMCR 0 /* Basic Mode Control Register */
#define KS8721_BMSR 1 /* Basic Mode Status Register */
#define KS8721_PHYID1 2 /* PHY Idendifier Register 1 */
#define KS8721_PHYID2 3 /* PHY Idendifier Register 2 */
#define KS8721_ANAR 4 /* Auto_Negotiation Advertisement Register */
#define KS8721_ANLPAR 5 /* Auto_negotiation Link Partner Ability Register */
#define KS8721_ANER 6 /* Auto-negotiation Expansion Register */
#define KS8721_DSCR 16 /* Specified Configuration Register */
#define KS8721_DSCSR 17 /* Specified Configuration and Status Register */
#define KS8721_10BTCSR 18 /* 10BASE-T Configuration and Satus Register */
#define KS8721_MDINTR 21 /* Specified Interrupt Register */
#define KS8721_RECR 22 /* Specified Receive Error Counter Register */
#define KS8721_DISCR 23 /* Specified Disconnect Counter Register */
#define KS8721_RLSR 24 /* Hardware Reset Latch State Register */
/* --Bit definitions: KS8721_BMCR */
#define KS8721_RESET (1 << 15) /* 1= Software Reset; 0=Normal Operation */
#define KS8721_LOOPBACK (1 << 14) /* 1=loopback Enabled; 0=Normal Operation */
#define KS8721_SPEED_SELECT (1 << 13) /* 1=100Mbps; 0=10Mbps */
#define KS8721_AUTONEG (1 << 12)
#define KS8721_POWER_DOWN (1 << 11)
#define KS8721_ISOLATE (1 << 10)
#define KS8721_RESTART_AUTONEG (1 << 9)
#define KS8721_DUPLEX_MODE (1 << 8)
#define KS8721_COLLISION_TEST (1 << 7)
/*--Bit definitions: KS8721_BMSR */
#define KS8721_100BASE_T4 (1 << 15)
#define KS8721_100BASE_TX_FD (1 << 14)
#define KS8721_100BASE_T4_HD (1 << 13)
#define KS8721_10BASE_T_FD (1 << 12)
#define KS8721_10BASE_T_HD (1 << 11)
#define KS8721_MF_PREAMB_SUPPR (1 << 6)
#define KS8721_AUTONEG_COMP (1 << 5)
#define KS8721_REMOTE_FAULT (1 << 4)
#define KS8721_AUTONEG_ABILITY (1 << 3)
#define KS8721_LINK_STATUS (1 << 2)
#define KS8721_JABBER_DETECT (1 << 1)
#define KS8721_EXTEND_CAPAB (1 << 0)
/*--definitions: KS8721_PHYID1 */
#define KS8721_PHYID1_OUI 0x0885
#define KS8721_LSB_MASK 0x3F
/*--Bit definitions: KS8721_ANAR, KS8721_ANLPAR */
#define KS8721_NP (1 << 15)
#define KS8721_ACK (1 << 14)
#define KS8721_RF (1 << 13)
#define KS8721_FCS (1 << 10)
#define KS8721_T4 (1 << 9)
#define KS8721_TX_FDX (1 << 8)
#define KS8721_TX_HDX (1 << 7)
#define KS8721_10_FDX (1 << 6)
#define KS8721_10_HDX (1 << 5)
#define KS8721_AN_IEEE_802_3 0x0001
/*--Bit definitions: KS8721_ANER */
#define KS8721_PDF (1 << 4)
#define KS8721_LP_NP_ABLE (1 << 3)
#define KS8721_NP_ABLE (1 << 2)
#define KS8721_PAGE_RX (1 << 1)
#define KS8721_LP_AN_ABLE (1 << 0)
/*--Bit definitions: KS8721_DSCR */
#define KS8721_BP4B5B (1 << 15)
#define KS8721_BP_SCR (1 << 14)
#define KS8721_BP_ALIGN (1 << 13)
#define KS8721_BP_ADPOK (1 << 12)
#define KS8721_REPEATER (1 << 11)
#define KS8721_TX (1 << 10)
#define KS8721_RMII_ENABLE (1 << 8)
#define KS8721_F_LINK_100 (1 << 7)
#define KS8721_SPLED_CTL (1 << 6)
#define KS8721_COLLED_CTL (1 << 5)
#define KS8721_RPDCTR_EN (1 << 4)
#define KS8721_SM_RST (1 << 3)
#define KS8721_MFP SC (1 << 2)
#define KS8721_SLEEP (1 << 1)
#define KS8721_RLOUT (1 << 0)
/*--Bit definitions: KS8721_DSCSR */
#define KS8721_100FDX (1 << 15)
#define KS8721_100HDX (1 << 14)
#define KS8721_10FDX (1 << 13)
#define KS8721_10HDX (1 << 12)
/*--Bit definitions: KS8721_10BTCSR */
#define KS8721_LP_EN (1 << 14)
#define KS8721_HBE (1 << 13)
#define KS8721_SQUELCH (1 << 12)
#define KS8721_JABEN (1 << 11)
#define KS8721_10BT_SER (1 << 10)
#define KS8721_POLR (1 << 0)
/*--Bit definitions: KS8721_MDINTR */
#define KS8721_INTR_PEND (1 << 15)
#define KS8721_FDX_MASK (1 << 11)
#define KS8721_SPD_MASK (1 << 10)
#define KS8721_LINK_MASK (1 << 9)
#define KS8721_INTR_MASK (1 << 8)
#define KS8721_FDX_CHANGE (1 << 4)
#define KS8721_SPD_CHANGE (1 << 3)
#define KS8721_LINK_CHANGE (1 << 2)
#define KS8721_INTR_STATUS (1 << 0)
/****************** function prototypes **********************/
unsigned int ks8721_IsPhyConnected(AT91PS_EMAC p_mac);
unsigned char ks8721_GetLinkSpeed(AT91PS_EMAC p_mac);
unsigned char ks8721_AutoNegotiate(AT91PS_EMAC p_mac, int *status);
unsigned char ks8721_InitPhy(AT91PS_EMAC p_mac);
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