On Wed, Apr 24, 2013 at 6:32 PM, Marek Vasut <[email protected]> wrote: > We don't have that on MX5. Or do you mean I should do the work and submit this > patch afterwards ?
To make things easier, I just sent a patch series that you can use :-) > Which one? Or do you mean generate two files full of register sets because of > these two bits? No, my suggestion is just to put these 2 defines into imx-regs.h. This is also part of my series I just sent. > >> > + >> > + /* NAND flash is muxed on ATA pins */ >> > + setbits_le32(M4IF_BASE_ADDR + 0xc, M4IF_GENP_WEIM_MM); >> > + >> > + /* Wait for Grant/Ack sequence (see EIM_CSnGCR2:MUX16_BYP_GRANT) >> > */ + for (i = 0x4; i < 0x94; i += 0x18) >> > + clrbits_le32(WEIM_BASE_ADDR + i, >> > WEIM_GCR2_MUX16_BYP_GRANT); + >> > + mxc_set_clock(0, 33, MXC_NFC_CLK); >> > + enable_nfc_clk(1); >> >> Shouldn't this function be placed into a common mx5 location? mx53ard >> uses the same. > > The WEIM and M4IF configuration is board-specific. Right, understood. It seems like a duplication of code from mx53ard, but anyway, what about: clrbits_le32(WEIM_BASE_ADDR + i, WEIM_GCR2_MUX16_BYP_GRANT) ? Accessing registers via offsets is not the best practice in U-boot. What about the weim struct defined at arch/arm/include/asm/arch-mx5/imx-regs.h for acessing such registers? _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
