Hi Andreas,

On 07/21/2013 07:02 AM, Andreas Bießmann wrote:
To answer the second question we can have a look at the specs. I can
presume by looking at the specs that we need to switch the drive
strength for the data I/O pins to higher level for this board to fix the
problem mentioned in the commit message. You have to know that this
specific part (configuring EBI for NAND access) is copied from board to
board (yes, another point to consolidate in near future). And this
specific part is copied over from at91samx5ek which seems to work with
lower drive strength. Unfortunately the concrete limit of EBI
capacitance is not specified in specs for at91sam9n12 nor at91sam9x35
devices. More distracting this parameter (EBI_DRIVE) seems to have
different reset values in at91sam9n12 and atsam9x35 devices, at least
the specs say so ... Atmel guys, please have a look on that and update
your specs!
Especially fill the TBD field in at91sam9n12 spec p. 311 (EBI_DRIVE in
CCFG_EBICSA) in version 11063I–ATARM–17-Apr-13. And possibly check why
there is EBI_DRIVE default to 'low' for 9x5 and default to 'high' for
9n12. There is also another bug in the specs, when you have to decide
between 'high' and 'low' you cant say the 'low' is required for
'capacitance < TBD pF' and 'high' is required for 'capacitance < TBD
pF', presumably the 'high' part should be chosen for 'capacitance > TBD pF'.

Thank for this information, I will check this with our colleagues.
Thanks again.

So from my point of view this patch fixes an existing bug in a new board
introduced in this releases MW. It uses a fairly new SoC which is first
used in this new board. Therefore

Acked-by: Andreas Bießmann<[email protected]>

And Tom, please apply this patch directly.

Best regards

Andreas Bießmann

Best Regards,
Bo Shen

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