Signed-off-by: Eric Nelson <[email protected]>
---
arch/arm/include/asm/arch-mx6/mx6q_pins.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/mx6q_pins.h
b/arch/arm/include/asm/arch-mx6/mx6q_pins.h
index f67a893..28e841a 100644
--- a/arch/arm/include/asm/arch-mx6/mx6q_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6q_pins.h
@@ -1432,7 +1432,7 @@ enum {
MX6_PAD_SD4_CLK__GPIO_7_10 = IOMUX_PAD(0x06E0, 0x02F8, 5,
0x0000, 0, 0),
MX6_PAD_NANDF_D0__RAWNAND_D0 = IOMUX_PAD(0x06E4, 0x02FC, 0,
0x0000, 0, 0),
MX6_PAD_NANDF_D0__USDHC1_DAT4 = IOMUX_PAD(0x06E4, 0x02FC, 1,
0x0000, 0, 0),
- MX6_PAD_NANDF_D0__GPU3D_GPU_DBG_OUT_0 = IOMUX_PAD(0x06E4, 0x02FC, 2,
0x0000, 0, 0),
+ MX6_PAD_NANDF_D0__GPU3D_GPU_DEBUG_OUT_0 = IOMUX_PAD(0x06E4, 0x02FC, 2,
0x0000, 0, 0),
MX6_PAD_NANDF_D0__USBOH3_UH2_DFD_OUT_16 = IOMUX_PAD(0x06E4, 0x02FC, 3,
0x0000, 0, 0),
MX6_PAD_NANDF_D0__USBOH3_UH3_DFD_OUT_16 = IOMUX_PAD(0x06E4, 0x02FC, 4,
0x0000, 0, 0),
MX6_PAD_NANDF_D0__GPIO_2_0 = IOMUX_PAD(0x06E4, 0x02FC, 5,
0x0000, 0, 0),
@@ -1440,7 +1440,7 @@ enum {
MX6_PAD_NANDF_D0__IPU2_IPU_DIAG_BUS_0 = IOMUX_PAD(0x06E4, 0x02FC, 7,
0x0000, 0, 0),
MX6_PAD_NANDF_D1__RAWNAND_D1 = IOMUX_PAD(0x06E8, 0x0300, 0,
0x0000, 0, 0),
MX6_PAD_NANDF_D1__USDHC1_DAT5 = IOMUX_PAD(0x06E8, 0x0300, 1,
0x0000, 0, 0),
- MX6_PAD_NANDF_D1__GPU3D_GPU_DEBUG_OUT1 = IOMUX_PAD(0x06E8, 0x0300, 2,
0x0000, 0, 0),
+ MX6_PAD_NANDF_D1__GPU3D_GPU_DEBUG_OUT_1 = IOMUX_PAD(0x06E8, 0x0300, 2,
0x0000, 0, 0),
MX6_PAD_NANDF_D1__USBOH3_UH2_DFD_OUT_17 = IOMUX_PAD(0x06E8, 0x0300, 3,
0x0000, 0, 0),
MX6_PAD_NANDF_D1__USBOH3_UH3_DFD_OUT_17 = IOMUX_PAD(0x06E8, 0x0300, 4,
0x0000, 0, 0),
MX6_PAD_NANDF_D1__GPIO_2_1 = IOMUX_PAD(0x06E8, 0x0300, 5,
0x0000, 0, 0),
@@ -1448,7 +1448,7 @@ enum {
MX6_PAD_NANDF_D1__IPU2_IPU_DIAG_BUS_1 = IOMUX_PAD(0x06E8, 0x0300, 7,
0x0000, 0, 0),
MX6_PAD_NANDF_D2__RAWNAND_D2 = IOMUX_PAD(0x06EC, 0x0304, 0,
0x0000, 0, 0),
MX6_PAD_NANDF_D2__USDHC1_DAT6 = IOMUX_PAD(0x06EC, 0x0304, 1,
0x0000, 0, 0),
- MX6_PAD_NANDF_D2__GPU3D_GPU_DBG_OUT_2 = IOMUX_PAD(0x06EC, 0x0304, 2,
0x0000, 0, 0),
+ MX6_PAD_NANDF_D2__GPU3D_GPU_DEBUG_OUT_2 = IOMUX_PAD(0x06EC, 0x0304, 2,
0x0000, 0, 0),
MX6_PAD_NANDF_D2__USBOH3_UH2_DFD_OUT_18 = IOMUX_PAD(0x06EC, 0x0304, 3,
0x0000, 0, 0),
MX6_PAD_NANDF_D2__USBOH3_UH3_DFD_OUT_18 = IOMUX_PAD(0x06EC, 0x0304, 4,
0x0000, 0, 0),
MX6_PAD_NANDF_D2__GPIO_2_2 = IOMUX_PAD(0x06EC, 0x0304, 5,
0x0000, 0, 0),
@@ -1456,7 +1456,7 @@ enum {
MX6_PAD_NANDF_D2__IPU2_IPU_DIAG_BUS_2 = IOMUX_PAD(0x06EC, 0x0304, 7,
0x0000, 0, 0),
MX6_PAD_NANDF_D3__RAWNAND_D3 = IOMUX_PAD(0x06F0, 0x0308, 0,
0x0000, 0, 0),
MX6_PAD_NANDF_D3__USDHC1_DAT7 = IOMUX_PAD(0x06F0, 0x0308, 1,
0x0000, 0, 0),
- MX6_PAD_NANDF_D3__GPU3D_GPU_DBG_OUT_3 = IOMUX_PAD(0x06F0, 0x0308, 2,
0x0000, 0, 0),
+ MX6_PAD_NANDF_D3__GPU3D_GPU_DEBUG_OUT_3 = IOMUX_PAD(0x06F0, 0x0308, 2,
0x0000, 0, 0),
MX6_PAD_NANDF_D3__USBOH3_UH2_DFD_OUT_19 = IOMUX_PAD(0x06F0, 0x0308, 3,
0x0000, 0, 0),
MX6_PAD_NANDF_D3__USBOH3_UH3_DFD_OUT_19 = IOMUX_PAD(0x06F0, 0x0308, 4,
0x0000, 0, 0),
MX6_PAD_NANDF_D3__GPIO_2_3 = IOMUX_PAD(0x06F0, 0x0308, 5,
0x0000, 0, 0),
@@ -1464,7 +1464,7 @@ enum {
MX6_PAD_NANDF_D3__IPU2_IPU_DIAG_BUS_3 = IOMUX_PAD(0x06F0, 0x0308, 7,
0x0000, 0, 0),
MX6_PAD_NANDF_D4__RAWNAND_D4 = IOMUX_PAD(0x06F4, 0x030C, 0,
0x0000, 0, 0),
MX6_PAD_NANDF_D4__USDHC2_DAT4 = IOMUX_PAD(0x06F4, 0x030C, 1,
0x0000, 0, 0),
- MX6_PAD_NANDF_D4__GPU3D_GPU_DBG_OUT_4 = IOMUX_PAD(0x06F4, 0x030C, 2,
0x0000, 0, 0),
+ MX6_PAD_NANDF_D4__GPU3D_GPU_DEBUG_OUT_4 = IOMUX_PAD(0x06F4, 0x030C, 2,
0x0000, 0, 0),
MX6_PAD_NANDF_D4__USBOH3_UH2_DFD_OUT_20 = IOMUX_PAD(0x06F4, 0x030C, 3,
0x0000, 0, 0),
MX6_PAD_NANDF_D4__USBOH3_UH3_DFD_OUT_20 = IOMUX_PAD(0x06F4, 0x030C, 4,
0x0000, 0, 0),
MX6_PAD_NANDF_D4__GPIO_2_4 = IOMUX_PAD(0x06F4, 0x030C, 5,
0x0000, 0, 0),
@@ -1472,7 +1472,7 @@ enum {
MX6_PAD_NANDF_D4__IPU2_IPU_DIAG_BUS_4 = IOMUX_PAD(0x06F4, 0x030C, 7,
0x0000, 0, 0),
MX6_PAD_NANDF_D5__RAWNAND_D5 = IOMUX_PAD(0x06F8, 0x0310, 0,
0x0000, 0, 0),
MX6_PAD_NANDF_D5__USDHC2_DAT5 = IOMUX_PAD(0x06F8, 0x0310, 1,
0x0000, 0, 0),
- MX6_PAD_NANDF_D5__GPU3D_GPU_DBG_OUT_5 = IOMUX_PAD(0x06F8, 0x0310, 2,
0x0000, 0, 0),
+ MX6_PAD_NANDF_D5__GPU3D_GPU_DEBUG_OUT_5 = IOMUX_PAD(0x06F8, 0x0310, 2,
0x0000, 0, 0),
MX6_PAD_NANDF_D5__USBOH3_UH2_DFD_OUT_21 = IOMUX_PAD(0x06F8, 0x0310, 3,
0x0000, 0, 0),
MX6_PAD_NANDF_D5__USBOH3_UH3_DFD_OUT_21 = IOMUX_PAD(0x06F8, 0x0310, 4,
0x0000, 0, 0),
MX6_PAD_NANDF_D5__GPIO_2_5 = IOMUX_PAD(0x06F8, 0x0310, 5,
0x0000, 0, 0),
@@ -1480,7 +1480,7 @@ enum {
MX6_PAD_NANDF_D5__IPU2_IPU_DIAG_BUS_5 = IOMUX_PAD(0x06F8, 0x0310, 7,
0x0000, 0, 0),
MX6_PAD_NANDF_D6__RAWNAND_D6 = IOMUX_PAD(0x06FC, 0x0314, 0,
0x0000, 0, 0),
MX6_PAD_NANDF_D6__USDHC2_DAT6 = IOMUX_PAD(0x06FC, 0x0314, 1,
0x0000, 0, 0),
- MX6_PAD_NANDF_D6__GPU3D_GPU_DBG_OUT_6 = IOMUX_PAD(0x06FC, 0x0314, 2,
0x0000, 0, 0),
+ MX6_PAD_NANDF_D6__GPU3D_GPU_DEBUG_OUT_6 = IOMUX_PAD(0x06FC, 0x0314, 2,
0x0000, 0, 0),
MX6_PAD_NANDF_D6__USBOH3_UH2_DFD_OUT_22 = IOMUX_PAD(0x06FC, 0x0314, 3,
0x0000, 0, 0),
MX6_PAD_NANDF_D6__USBOH3_UH3_DFD_OUT_22 = IOMUX_PAD(0x06FC, 0x0314, 4,
0x0000, 0, 0),
MX6_PAD_NANDF_D6__GPIO_2_6 = IOMUX_PAD(0x06FC, 0x0314, 5,
0x0000, 0, 0),
@@ -1488,7 +1488,7 @@ enum {
MX6_PAD_NANDF_D6__IPU2_IPU_DIAG_BUS_6 = IOMUX_PAD(0x06FC, 0x0314, 7,
0x0000, 0, 0),
MX6_PAD_NANDF_D7__RAWNAND_D7 = IOMUX_PAD(0x0700, 0x0318, 0,
0x0000, 0, 0),
MX6_PAD_NANDF_D7__USDHC2_DAT7 = IOMUX_PAD(0x0700, 0x0318, 1,
0x0000, 0, 0),
- MX6_PAD_NANDF_D7__GPU3D_GPU_DBG_OUT_7 = IOMUX_PAD(0x0700, 0x0318, 2,
0x0000, 0, 0),
+ MX6_PAD_NANDF_D7__GPU3D_GPU_DEBUG_OUT_7 = IOMUX_PAD(0x0700, 0x0318, 2,
0x0000, 0, 0),
MX6_PAD_NANDF_D7__USBOH3_UH2_DFD_OUT_23 = IOMUX_PAD(0x0700, 0x0318, 3,
0x0000, 0, 0),
MX6_PAD_NANDF_D7__USBOH3_UH3_DFD_OUT_23 = IOMUX_PAD(0x0700, 0x0318, 4,
0x0000, 0, 0),
MX6_PAD_NANDF_D7__GPIO_2_7 = IOMUX_PAD(0x0700, 0x0318, 5,
0x0000, 0, 0),
--
1.8.1.2
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