On 07/03/2016 09:33 PM, Stefan Agner wrote:
From: Stefan Agner <stefan.ag...@toradex.com>Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the OTG Power Pin to be high active. Low active is the reset value of the affected configuration register, hence the config option is named by the non-reset configuration. Signed-off-by: Stefan Agner <stefan.ag...@toradex.com> --- drivers/usb/host/ehci-mx6.c | 4 ++++ include/configs/mx7dsabresd.h | 1 + include/configs/warp7.h | 1 + 3 files changed, 6 insertions(+) diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 0dbabb2..65aede7 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -212,7 +212,11 @@ static void usb_power_config(int index) setbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB); /* Set power polarity to high active */ +#ifdef CONFIG_MXC_USB_OTG_HACTIVE setbits_le32(ctrl, UCTRL_PWR_POL); +#else + clrbits_le32(ctrl, UCTRL_PWR_POL); +#endif
This should go into 2/9 Also, if it is at all possible already to configure this from DT, do it. If not, we'd have to deal with another macro, meh. At least convert this macro to Kconfig and document the Kconfig entry.
} int usb_phy_mode(int port) diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index ece8a03..d8c9245 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -245,6 +245,7 @@ #define CONFIG_USB_ETHER_ASIX #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_MXC_USB_OTG_HACTIVE #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_IMX_THERMAL diff --git a/include/configs/warp7.h b/include/configs/warp7.h index fc0e51a..77db732 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -121,6 +121,7 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_MXC_USB_OTG_HACTIVE #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */ #define CONFIG_IMX_THERMAL
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