This series addresses a PCIe reliability issue as observed on Apalis T30
related to a PCIe reset timing violation.

This series depends on Simon's work available at u-boot-dm/master plus
my previous series "move apalis t30/tk1, colibri t20/t30 to livetree"
and "fix apalis-tk1 pcie gigabit ethernet operation".

This series is available at

Changes in v2:
- Leave resp. enable all port 0 pins input drivers as a customer may
  optionally want to use some of those MXM3 pins as inputs as well.
- Stick to struct tegra_pcie_port as suggested by Stephen.
- Introduce proper CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT Kconfig option
  as suggested by Stephen.
- Improved the ifdef vs. if curly braces sequencing as suggested by
- Keep PCIe port reset status in order to safeguard for future changes
  to the port reset order or even allow for re-initialisation should
  that ever be implemented in the higher levels of the driver model.

Marcel Ziswiler (3):
  apalis_t30: describe pcie ports
  apalis_t30: fix pcie port 0 and 1 pin muxing
  apalis_t30: fix optional pcie port reset for reliable pcie operation

 arch/arm/dts/tegra30-apalis.dts                    |  3 ++
 board/toradex/apalis_t30/Kconfig                   |  9 ++++
 board/toradex/apalis_t30/apalis_t30.c              | 54 ++++++++++++++++++++++
 .../toradex/apalis_t30/pinmux-config-apalis_t30.h  | 16 ++++---
 4 files changed, 75 insertions(+), 7 deletions(-)


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