On 4/9/19 8:52 PM, Simon Goldschmidt wrote: > Remove outdated defines (not used any more, outdated due to DM > conversion) from socfpga_common.h.
s/defines/macros and comments/ > Signed-off-by: Simon Goldschmidt <[email protected]> > --- > > Changes in v2: > - remove even more outdated things > > include/configs/socfpga_common.h | 40 -------------------------------- > 1 file changed, 40 deletions(-) > > diff --git a/include/configs/socfpga_common.h > b/include/configs/socfpga_common.h > index a65fc804e3..5b5e5f5d43 100644 > --- a/include/configs/socfpga_common.h > +++ b/include/configs/socfpga_common.h > @@ -72,29 +72,12 @@ > #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE > /* Boot argument buffer size */ > > -#ifndef CONFIG_SYS_HOSTNAME > -#define CONFIG_SYS_HOSTNAME CONFIG_SYS_BOARD > -#endif > - > /* > * Cache > */ > #define CONFIG_SYS_L2_PL310 > #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS > > -/* > - * EPCS/EPCQx1 Serial Flash Controller > - */ > -#ifdef CONFIG_ALTERA_SPI > -/* > - * The base address is configurable in QSys, each board must specify the > - * base address based on it's particular FPGA configuration. Please note > - * that the address here is incremented by 0x400 from the Base address > - * selected in QSys, since the SPI registers are at offset +0x400. > - * #define CONFIG_SYS_SPI_BASE 0xff240400 > - */ > -#endif > - > /* > * Ethernet on SoC (EMAC) > */ > @@ -162,15 +145,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); > #define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() > #endif > > -/* > - * Designware SPI support > - */ > - > -/* > - * Serial Driver > - */ > -#define CONFIG_SYS_NS16550_SERIAL Are you sure about this one ? > /* > * USB > */ > @@ -206,20 +180,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); > #define CONFIG_ENV_SECT_SIZE (64 * 1024) > #endif > > -/* > - * mtd partitioning for serial NOR flash > - * > - * device nor0 <ff705000.spi.0>, # parts = 6 > - * #: name size offset mask_flags > - * 0: u-boot 0x00100000 0x00000000 0 > - * 1: env1 0x00040000 0x00100000 0 > - * 2: env2 0x00040000 0x00140000 0 > - * 3: UBI 0x03e80000 0x00180000 0 > - * 4: boot 0x00e80000 0x00180000 0 > - * 5: rootfs 0x01000000 0x01000000 0 > - * > - */ > - > /* > * SPL > * > -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
