Am 09.04.2019 um 21:27 schrieb Marek Vasut:
On 4/9/19 8:52 PM, Simon Goldschmidt wrote:
All socfpga boards except for vining_fpga use DM_I2C. Enable
DM_I2C for this board and set the EEPROM defines via Kconfig
(enabling CONFIG_I2C_EEPROM from MISC).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com>
---
Changes in v2:
- added (this) patch to move socfpga_vining to DM_I2C
configs/socfpga_vining_fpga_defconfig | 8 +++++++-
include/configs/socfpga_common.h | 26 --------------------------
include/configs/socfpga_vining_fpga.h | 9 ---------
3 files changed, 7 insertions(+), 36 deletions(-)
Isn't this missing some DT bit which would enable the I2C controller ?
Or is that already in the DT for this platform ?
Well, I don't have the board (I tested with socfpga_socrates + Phy1
addon board which does have an i2c eeprom but needs an FPGA config to
work), but to me it seems 'socfpga_cyclone5_vining_fpga.dts' should have
everything we need, or what do you think is missing?
Having this tested on a real socfpga_vining board would be great of
course...
Regards,
Simon
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