On 4/9/19 9:45 PM, Simon Goldschmidt wrote: > Am 09.04.2019 um 21:28 schrieb Marek Vasut: >> On 4/9/19 8:52 PM, Simon Goldschmidt wrote: >>> Remove outdated defines (not used any more, outdated due to DM >>> conversion) from socfpga_common.h. >> >> s/defines/macros and comments/ > >>> Signed-off-by: Simon Goldschmidt <[email protected]> >>> --- >>> >>> Changes in v2: >>> - remove even more outdated things >>> >>> include/configs/socfpga_common.h | 40 -------------------------------- >>> 1 file changed, 40 deletions(-) >>> >>> diff --git a/include/configs/socfpga_common.h >>> b/include/configs/socfpga_common.h >>> index a65fc804e3..5b5e5f5d43 100644 >>> --- a/include/configs/socfpga_common.h >>> +++ b/include/configs/socfpga_common.h >>> @@ -72,29 +72,12 @@ >>> #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE >>> /* Boot argument buffer size */ >>> -#ifndef CONFIG_SYS_HOSTNAME >>> -#define CONFIG_SYS_HOSTNAME CONFIG_SYS_BOARD >>> -#endif >>> - >>> /* >>> * Cache >>> */ >>> #define CONFIG_SYS_L2_PL310 >>> #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS >>> -/* >>> - * EPCS/EPCQx1 Serial Flash Controller >>> - */ >>> -#ifdef CONFIG_ALTERA_SPI >>> -/* >>> - * The base address is configurable in QSys, each board must specify >>> the >>> - * base address based on it's particular FPGA configuration. Please >>> note >>> - * that the address here is incremented by 0x400 from the Base >>> address >>> - * selected in QSys, since the SPI registers are at offset +0x400. >>> - * #define CONFIG_SYS_SPI_BASE 0xff240400 >>> - */ >>> -#endif >>> - >>> /* >>> * Ethernet on SoC (EMAC) >>> */ >>> @@ -162,15 +145,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); >>> #define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() >>> #endif >>> -/* >>> - * Designware SPI support >>> - */ >>> - >>> -/* >>> - * Serial Driver >>> - */ >>> -#define CONFIG_SYS_NS16550_SERIAL >> >> Are you sure about this one ? > > Yes. This is only used in 'drivers/serial/Makefile' if CONFIG_DM_SERIAL > is not defined. No need to keep it. > > Should I still send a v3 for the commit message?
Would be nice. Can you prep me a PR with the patches for current release? -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
