On 17.04.19 22:15, Marek Vasut wrote:
Disable bridges between L3 Main switch and FPGA unless booting
from FPGA and keep them disabled to prevent glitches and possible
hangs of the L3 Main switch.
The current version of the code could have enabled the bridges
between the L3 Main switch and FPGA for a short period of time
in board_init_f() in case the FPGA was programmed and then again
disable them at the end of board_init_f(). Replace this with a
code which only sets up the handoff registers and let the user
enable the bridges later on.
Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Chin Liang See <chin.liang....@intel.com>
Cc: Dinh Nguyen <dingu...@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com>
Cc: Tien Fong Chee <tien.fong.c...@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com>
---
arch/arm/mach-socfpga/spl_gen5.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c
index 45382b549a..aa88f2cf3e 100644
--- a/arch/arm/mach-socfpga/spl_gen5.c
+++ b/arch/arm/mach-socfpga/spl_gen5.c
@@ -188,7 +188,7 @@ void board_init_f(ulong dummy)
/* De-assert reset for peripherals and bridges based on handoff */
reset_deassert_peripherals_handoff();
- socfpga_bridges_reset(0);
+ socfpga_bridges_set_handoff_regs(true, true, true);
debug("Unfreezing/Thaw all I/O banks\n");
/* unfreeze / thaw all IO banks */
@@ -228,7 +228,4 @@ void board_init_f(ulong dummy)
puts("SDRAM size check failed!\n");
hang();
}
-
- if (!socfpga_is_booting_from_fpga())
- socfpga_bridges_reset(1);
}
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