Re: [PATCH 1/2] mmc: fsl_esdhc: set sysctl register for clock initialization

[Jaehoon Chung]

Dear Yangbo,

On 10/16/20 12:13 PM, Yangbo Lu wrote:
> The initial clock setting should be through sysctl register only,
> while the mmc_set_clock() will call mmc_set_ios() introduce other
> configurations like bus width, mode, and so on.
> 
> Signed-off-by: Yangbo Lu <yangbo...@nxp.com>

Reviewed-by: Jaehoon Chung <jh80.ch...@samsung.com>

Best Regards,
Jaehoon Chung

> ---
>  drivers/mmc/fsl_esdhc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index 642784e..68130ee 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -715,7 +715,7 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, 
> struct mmc *mmc)
>       esdhc_setbits32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
>  
>       /* Set the initial clock speed */
> -     mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE);
> +     set_sysctl(priv, mmc, 400000);
>  
>       /* Disable the BRR and BWR bits in IRQSTAT */
>       esdhc_clrbits32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
>