> -----Original Message----- > From: Lim, Elly Siew Chin <[email protected]> > Sent: Wednesday, March 31, 2021 10:39 PM > To: [email protected] > Cc: Marek Vasut <[email protected]>; Tan, Ley Foon > <[email protected]>; See, Chin Liang <[email protected]>; > Simon Goldschmidt <[email protected]>; Chee, Tien Fong > <[email protected]>; Westergreen, Dalon > <[email protected]>; Simon Glass <[email protected]>; Gan, > Yau Wai <[email protected]>; Lim, Elly Siew Chin > <[email protected]> > Subject: [v1 02/17] arm: socfpga: Add base address for Intel N5X device > > Reuse base_addr_soc64.h for Intel N5X device, the address is the same as > Agilex. > > Signed-off-by: Siew Chin Lim <[email protected]> > --- > arch/arm/mach-socfpga/include/mach/base_addr_soc64.h | 3 ++- Reviewed-by: Ley Foon Tan <[email protected]>
- [v1 00/17] Add Intel N5X SoC support Siew Chin Lim
- [v1 01/17] arm: socfpga: Changed base_addr_s10.h ... Siew Chin Lim
- RE: [v1 01/17] arm: socfpga: Changed base_add... Tan, Ley Foon
- [v1 02/17] arm: socfpga: Add base address for Int... Siew Chin Lim
- RE: [v1 02/17] arm: socfpga: Add base address... Tan, Ley Foon
- [v1 03/17] arm: socfpga: Add handoff data support... Siew Chin Lim
- RE: [v1 03/17] arm: socfpga: Add handoff data... Tan, Ley Foon
- RE: [v1 03/17] arm: socfpga: Add handoff ... Chee, Tien Fong
- [v1 05/17] arm: socfpga: Get clock manager base a... Siew Chin Lim
- RE: [v1 05/17] arm: socfpga: Get clock manage... Tan, Ley Foon
- [v1 04/17] drivers: clk: Add clock driver for Int... Siew Chin Lim
- RE: [v1 04/17] drivers: clk: Add clock driver... Tan, Ley Foon
- RE: [v1 04/17] drivers: clk: Add clock dr... Lim, Elly Siew Chin
- [v1 06/17] drivers: clk: Add memory clock driver ... Siew Chin Lim
- RE: [v1 06/17] drivers: clk: Add memory clock... Tan, Ley Foon

