> -----Original Message-----
> From: Lim, Elly Siew Chin <[email protected]>
> Sent: Wednesday, March 31, 2021 10:39 PM
> To: [email protected]
> Cc: Marek Vasut <[email protected]>; Tan, Ley Foon
> <[email protected]>; See, Chin Liang <[email protected]>;
> Simon Goldschmidt <[email protected]>; Chee, Tien Fong
> <[email protected]>; Westergreen, Dalon
> <[email protected]>; Simon Glass <[email protected]>; Gan,
> Yau Wai <[email protected]>; Lim, Elly Siew Chin
> <[email protected]>
> Subject: [v1 03/17] arm: socfpga: Add handoff data support for Intel N5X
> device
> 
> N5X support both HPS handoff data and DDR handoff data.
> HPS handoff data support re-use Straix10 and Agilex code. DDR handoff data
> is newly introduced for N5X.
> 
> Signed-off-by: Siew Chin Lim <[email protected]>
> ---
>  arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 28
> +++++++++++++++
>  arch/arm/mach-socfpga/wrap_handoff_soc64.c         | 40
> ++++++++++++++++++++++
>  2 files changed, 68 insertions(+)
> 
> diff --git a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h


[...]


> diff --git a/arch/arm/mach-socfpga/wrap_handoff_soc64.c
> b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
> index a7ad7a18ed..37b4c360fb 100644
> --- a/arch/arm/mach-socfpga/wrap_handoff_soc64.c
> +++ b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
> @@ -60,6 +60,46 @@ int socfpga_handoff_read(void *handoff_address,
> void *table, u32 table_len,
>                       debug("at addr  0x%p\n", (u32 *)handoff_address);
>                       return -EPERM;
>               }
> +     } else {
> +#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
> +             temp = readl(handoff_address);
> +             if (temp == SOC64_HANDOFF_DDR_UMCTL2_MAGIC) {
> +                     debug("%s: umctl2 handoff data =\n{\n",
> +                           __func__);
> +             } else if (temp == SOC64_HANDOFF_DDR_PHY_MAGIC) {
> +                     debug("%s: PHY handoff data =\n{\n",
> +                           __func__);
> +             } else if (temp ==
> SOC64_HANDOFF_DDR_PHY_INIT_ENGINE_MAGIC) {
> +                     debug("%s: PHY engine handoff data =\n{\n",
> +                           __func__);
> +             }
> +
> +             debug("handoff table address = 0x%p table length = 0x%x\n",
> +                   table_x32, table_len);
> +
> +             if (temp == SOC64_HANDOFF_DDR_UMCTL2_MAGIC ||
> +                 temp == SOC64_HANDOFF_DDR_PHY_MAGIC ||
> +                 temp ==
> SOC64_HANDOFF_DDR_PHY_INIT_ENGINE_MAGIC) {
> +                     for (i = 0; i < table_len; i++) {
> +                             *table_x32 = readl(handoff_address +
> +
>       SOC64_HANDOFF_OFFSET_DATA +
> +                                             (i * 4));
> +
> +                             if (!(i % 2))
> +                                     debug(" No.%d Addr 0x%08x: ", i,
> +                                           *table_x32);
> +                             else
> +                                     debug(" 0x%08x\n", *table_x32);
> +
> +                             table_x32++;
> +                     }
> +                     debug("\n}\n");
> +             } else {
> +                     debug("%s: Cannot find HANDOFF MAGIC ",
> __func__);
> +                     debug("at addr 0x%p\n", (u32 *)handoff_address);
> +                     return -EPERM;
> +             }
> +#endif
>       }
> 
>       return 0;

1. Can we auto detect the endianness from the magic word?
2. Can merge or simplify  the big and little endian flow? Do swap when it is 
big endian.


Regards
Ley Foon


Regards
Ley Foon

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