RK3568 ram initialization code uses helper function from PX30 controller. RK3568 pctl supports 4 memory ranks. Handle this properly when modifying pctl's PCTL2_MSTR register by clearing bits for all four ranks before applying detected DRAM rank configuration.
Signed-off-by: Pavel Golikov <[email protected]> --- drivers/ram/rockchip/sdram_pctl_px30.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ram/rockchip/sdram_pctl_px30.c b/drivers/ram/rockchip/sdram_pctl_px30.c index 3ec98af536e..0f42c191dc3 100644 --- a/drivers/ram/rockchip/sdram_pctl_px30.c +++ b/drivers/ram/rockchip/sdram_pctl_px30.c @@ -149,7 +149,7 @@ u32 pctl_remodify_sdram_params(struct ddr_pctl_regs *pctl_regs, } } - tmp &= ~((3ul << 30) | (3ul << 24) | (3ul << 12)); + tmp &= ~((3ul << 30) | (0xful << 24) | (3ul << 12)); switch (cap_info->dbw) { case 2: -- 2.25.1
