Francesco, My understanding is that the Aquila board was previously having intermittent boot failures, hence the comparison of the TI EVM register values vs. the Aquila board register values. My understanding is that since then, two unrelated issues were identified resulting in the observed behavior, and both have been resolved.
However in general, more than one IO setting can be adequate for a given design, and it is also acceptable to have different IO settings for different board designs and/or for different DDRSS on the same board. Regards, Kevin -----Original Message----- From: Francis, Neha <[email protected]> Sent: Tuesday, April 21, 2026 5:11 AM To: Francesco Dolcini <[email protected]>; Scholz, Kevin <[email protected]> Cc: Franz Schnyder <[email protected]>; [email protected]; K, Santhosh Kumar <[email protected]>; Brattlof, Bryan <[email protected]>; Chawdhry, Manorit <[email protected]>; [email protected]; Kumar, Udit <[email protected]>; Gujulan Elango, Hari Prasath <[email protected]> Subject: Re: [EXTERNAL] Re: [PATCH v2 5/7] arm: dts: k3-am69: ddr: Update to v0.12.0 of DDR config tool Hi Kevin On 20/11/25 20:18, Francesco Dolcini wrote: > Hello Kevin, > > On Thu, Nov 20, 2025 at 02:23:02PM +0000, Scholz, Kevin wrote: >> >> ODT is user configurable from the TDA4x (J784S4) DDR config tool. >> Custom boards can modify this setting as needed. > > Thanks for explaining me the tool and the related config options and > changes, however the question is why you have this difference in your > specific configuration for AM69A SK board in which only dram3 has ODT > enabled, and dram, dram1 and dram2 not. Is the layout/schematics of > DRAM3 different from the others? Why? Is there any specific reason for doing this as Francesco has pointed out? > > Francesco > -- Thanking You Neha Malcom Francis
