Hi Jonas, On Sun, May 24, 2026 at 08:42:33PM +0200, Jonas Karlman wrote: > Hi Pavel, > > On 5/17/2026 9:24 PM, Pavel Golikov wrote: > > Properly initialize cru address space reference when CONFIG_OF_PLATDATA > > is enabled. > > Do we have to use OF_PLATDATA for TPL to fit into SRAM?
DRAM driver is heavily based on one for rv1126. rv1126 utilizes OF_PLATDATA, even though it is 32 bit (with the same amount of SRAM), and 32 bit TPL should be even smaller. > Also, why do we need CLK driver in TPL? Based on small glance at the > code it looks like the DPLL was handled by the RAM driver itself. I'm getting aarch64-linux-gnu-ld: arch/arm/mach-rockchip/rk3568/clk_rk3568.o: in function `rockchip_get_clk': <...>/build-tpl/../arch/arm/mach-rockchip/rk3568/clk_rk3568.c:14: undefined reference to `_u_boot_list_2_driver_2_rockchip_rk3568_cru' aarch64-linux-gnu-ld: <...>/build-tpl/../arch/arm/mach-rockchip/rk3568/clk_rk3568.c:14: undefined reference to `_u_boot_list_2_driver_2_rockchip_rk3568_cru' when trying to build TPL without CLK (both with OF_PLATDATA and OF_REAL). rockchip_get_clk is needed by sysreset_rockchip, which, in turn, is always built for ARCH_ROCKCHIP (sorry). We could actually delegate DPLL to CLK, but there is no API to configure spread spectrum (although it is disabled by default in loader_params). I also have no idea of how MSCH clock tree looks like. Regards, Pavel
