From: Abhash Kumar Jha <[email protected]> While resuming from suspend, the wakeup reason need to be stored and this will be used by the Linux kernel once its up.
Use the 32 bytes of MCU_PSRAM0_RAM area (addr = 0x40280000) to store the wakeup reason. Read the value as soon as it starts and store it internally. Signed-off-by: Abhash Kumar Jha <[email protected]> Co-developed-by: Richard Genoud (TI) <[email protected]> Signed-off-by: Richard Genoud (TI) <[email protected]> --- arch/arm/mach-k3/Kconfig | 10 ++++++++++ arch/arm/mach-k3/r5/lpm-common.c | 24 ++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index 4b7cef64935c..667e23bf2293 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -101,6 +101,16 @@ config SYS_K3_BOOT_CORE_ID int default 16 +config SYS_K3_SCRATCH_LPM_ADDR + hex + default 0x40280000 if SOC_K3_J721E || SOC_K3_J7200 || SOC_K3_J784S4 + default 0x0 + help + Address where the wake-up reason is stored at resume (32 bits). + It will be read by the Linux kernel once its up. + On J7200/J784s4 the MCU_PSRAM0_RAM is used by default. + Set it to 0 if unused. + config K3_EARLY_CONS bool "Activate to allow for an early console during SPL" depends on SPL diff --git a/arch/arm/mach-k3/r5/lpm-common.c b/arch/arm/mach-k3/r5/lpm-common.c index 1b3660f8243b..539a2207f986 100644 --- a/arch/arm/mach-k3/r5/lpm-common.c +++ b/arch/arm/mach-k3/r5/lpm-common.c @@ -29,6 +29,11 @@ /* PMIC register where the magic value resides */ #define K3_LPM_SCRATCH_PAD_REG_3 0xcb +/* Wake-up source IDs */ +#define K3_LPM_WAKE_SOURCE_MAIN_IO 0x80 +#define K3_LPM_WAKE_SOURCE_MCU_IO 0x81 +#define K3_LPM_WAKE_SOURCE_PMIC_GPIO 0xB0 + #define IO_ISO_STATUS BIT(25) #define FW_IMAGE_SIZE 0x80000 @@ -40,6 +45,11 @@ struct lpm_addr_info { u32 size; }; +struct lpm_scratch_space { + u16 wake_src; + u16 reserved; +} __packed; + __weak void clear_isolation(void) { } /* This is used by J722s */ @@ -48,6 +58,7 @@ __weak void ctrl_mmr_unlock(void) { } /* in board_init_f(), there's no BSS, so we can't use global/static variables */ bool j7xx_board_is_resuming(void) { + struct lpm_scratch_space *lpm_scratch; struct udevice *pmic, *i2c; u32 pmctrl_val = 0; int ret; @@ -58,7 +69,18 @@ bool j7xx_board_is_resuming(void) #ifdef PMCTRL_IO_LPM pmctrl_val = readl(PMCTRL_IO_LPM); #endif + lpm_scratch = (struct lpm_scratch_space *)CONFIG_SYS_K3_SCRATCH_LPM_ADDR; + if (lpm_scratch) { + lpm_scratch->wake_src = 0; + lpm_scratch->reserved = 0; + } if ((pmctrl_val & IO_ISO_STATUS) == IO_ISO_STATUS) { + if (lpm_scratch) { + if (IS_ENABLED(CONFIG_SOC_K3_J784S4)) + lpm_scratch->wake_src = K3_LPM_WAKE_SOURCE_MCU_IO; + else + lpm_scratch->wake_src = K3_LPM_WAKE_SOURCE_MAIN_IO; + } clear_isolation(); gd_set_k3_resuming(K3_RESUME_STATE_RESUMING); debug("board is resuming from IO_DDR mode\n"); @@ -100,6 +122,8 @@ bool j7xx_board_is_resuming(void) if (ret == K3_LPM_MAGIC_SUSPEND) { debug("%s: board is resuming\n", __func__); + if (lpm_scratch) + lpm_scratch->wake_src = K3_LPM_WAKE_SOURCE_PMIC_GPIO; gd_set_k3_resuming(K3_RESUME_STATE_RESUMING); /* clean magic suspend */ -- 2.47.3
