Add support for resuming from suspend in board_init_f. The resume state of the SOC is identified and lpm resume sequence is followed accordingly.
First, add the board specific part of the exit retention sequence for k3-ddrss following the DDR resume sequence: - exit DDR from retention - de-assert the DDR_RET pin - restore DDR max frequency - exit DDR from low power The self-refresh exit sequence is performed in a loop for each DDR controller. (J784S4 has 4 DDR controllers and J742S2 has only 2) Select the number of ddr controllers on the basis of CONFIG_TARGET_J742S2_R5_EVM build flag. Then: - Extract context address from devicetree and send to TIFS. - Power on the rproc cluster. - Replay the certificates attached to saved images of ATF and OPTEE. - Resume sequence for context restore and rproc resume. - Image entry to DM firmware. (All those steps are done in do_resume()) The context address area is firewalled by TIFS to protect it from other hosts. Co-developed-by: Gregory CLEMENT (TI) <[email protected]> Signed-off-by: Gregory CLEMENT (TI) <[email protected]> Signed-off-by: Thomas Richard (TI) <[email protected]> Co-developed-by: Prasanth Babu Mantena <[email protected]> Signed-off-by: Prasanth Babu Mantena <[email protected]> Co-developed-by: Abhash Kumar Jha <[email protected]> Signed-off-by: Abhash Kumar Jha <[email protected]> Signed-off-by: Richard Genoud (TI) <[email protected]> --- arch/arm/mach-k3/j784s4/j784s4_init.c | 70 ++++++++++++++++++++++++++- board/ti/j784s4/evm.c | 3 +- 2 files changed, 70 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c index 53f152ccd9c6..5646d41a59f4 100644 --- a/arch/arm/mach-k3/j784s4/j784s4_init.c +++ b/arch/arm/mach-k3/j784s4/j784s4_init.c @@ -18,11 +18,18 @@ #include <mmc.h> #include <remoteproc.h> #include <k3_bist.h> +#include <power/pmic.h> +#include <mach/k3-ddr.h> #include "../sysfw-loader.h" #include "../common.h" +#include "../lpm-common.h" -#define J784S4_MAX_DDR_CONTROLLERS 4 +#if IS_ENABLED(CONFIG_TARGET_J742S2_R5_EVM) +#define MAX_DDR_CONTROLLERS 2 +#else +#define MAX_DDR_CONTROLLERS 4 +#endif #define CTRL_MMR_CFG0_AUDIO_REFCLK1_CTRL 0x001082e4 #define AUDIO_REFCLK1_DEFAULT 0x1c @@ -264,26 +271,85 @@ void k3_spl_init(void) k3_dm_print_ver(); } +#define DDR_RET_VAL BIT(5) +#define GPIO_OUT_1 0x3D +#define PMIC_NSLEEP_REG 0x86 + +static void k3_deassert_DDR_RET(void) +{ + struct udevice *pmic; + int regval; + int err; + + err = uclass_get_device_by_name(UCLASS_PMIC, + "pmic@48", &pmic); + if (err) { + printf("Getting PMIC init failed: %d\n", err); + return; + } + + /* Set DDR_RET Signal Low on PMIC B */ + regval = pmic_reg_read(pmic, GPIO_OUT_1) & ~DDR_RET_VAL; + + pmic_reg_write(pmic, GPIO_OUT_1, regval); + pmic_reg_write(pmic, PMIC_NSLEEP_REG, 0x3); +} + +__weak bool j7xx_board_is_resuming(void) +{ + return false; +} + void k3_mem_init(void) { struct udevice *dev; int ret, ctrl = 0; if (IS_ENABLED(CONFIG_K3_J721E_DDRSS)) { + struct udevice *devs[MAX_DDR_CONTROLLERS]; + struct k3_ddrss_regs regs[MAX_DDR_CONTROLLERS]; + ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) panic("DRAM 0 init failed: %d\n", ret); + + devs[0] = dev; ctrl++; - while (ctrl < J784S4_MAX_DDR_CONTROLLERS) { + while (ctrl < MAX_DDR_CONTROLLERS) { ret = uclass_next_device_err(&dev); if (ret == -ENODEV) break; if (ret) panic("DRAM %d init failed: %d\n", ctrl, ret); + devs[ctrl] = dev; ctrl++; } + + if (j7xx_board_is_resuming()) { + /* exit DDRs from retention */ + for (ctrl = 0; ctrl < MAX_DDR_CONTROLLERS; ctrl++) { + k3_ddrss_lpddr4_exit_retention(devs[ctrl], + ®s[ctrl]); + } + + /* de-assert DDR_RET pin */ + k3_deassert_DDR_RET(); + + /* restore DDR max frequency */ + for (ctrl = 0; ctrl < MAX_DDR_CONTROLLERS; ctrl++) + k3_ddrss_lpddr4_change_freq(devs[ctrl]); + + /* exit DDR from low power */ + for (ctrl = 0; ctrl < MAX_DDR_CONTROLLERS; ctrl++) { + k3_ddrss_lpddr4_exit_low_power(devs[ctrl], + ®s[ctrl]); + } + printf("Initialized %d DRAM controllers\n", ctrl); + + do_resume(); + } printf("Initialized %d DRAM controllers\n", ctrl); } diff --git a/board/ti/j784s4/evm.c b/board/ti/j784s4/evm.c index 73730ca94438..851dc274d509 100644 --- a/board/ti/j784s4/evm.c +++ b/board/ti/j784s4/evm.c @@ -63,7 +63,8 @@ int board_late_init(void) } #endif -#if (IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_TARGET_J784S4_R5_EVM)) +#if (IS_ENABLED(CONFIG_SPL_BUILD) && (IS_ENABLED(CONFIG_TARGET_J784S4_R5_EVM) || \ + IS_ENABLED(CONFIG_TARGET_J742S2_R5_EVM))) void clear_isolation(void) { int ret; -- 2.47.3
