MT8188 currently declares a separate U_BOOT_DRIVER, mtk_clk_tree, probe() function and compatible table for each clock gate controller, despite all of them sharing the same implementation.
Convert MT8188 to use the generic mtk_gate_clk_data infrastructure. This allows all clock gate controllers to share a single generic driver, eliminating duplicated code while preserving the existing behaviour. No functional change intended. Signed-off-by: Julien Stephan <[email protected]> --- drivers/clk/mediatek/clk-mt8188.c | 161 ++++++++++---------------------------- 1 file changed, 41 insertions(+), 120 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8188.c b/drivers/clk/mediatek/clk-mt8188.c index f73fa1fce95..cbaea9f0b2e 100644 --- a/drivers/clk/mediatek/clk-mt8188.c +++ b/drivers/clk/mediatek/clk-mt8188.c @@ -1619,11 +1619,6 @@ static const struct mtk_gate infracfg_ao_clks[] = { GATE_INFRA_AO4(CLK_INFRA_AO_RG_AES_MSDCFDE_CK_0P, CLK_TOP_AES_MSDCFDE, 18), }; -static const struct mtk_clk_tree mt8188_infracfg_ao_clk_tree = { - .ext_clk_rates = ext_clock_rates, - .num_ext_clks = ARRAY_SIZE(ext_clock_rates), -}; - static const struct mtk_gate_regs peri_ao_cg_regs = { .set_ofs = 0x10, .clr_ofs = 0x14, @@ -1662,11 +1657,6 @@ static const struct mtk_gate pericfg_ao_clks[] = { GATE_PERI_AO(CLK_PERI_AO_PCIE_P0_FMEM, CLK_TOP_466M_FMEM, 24), }; -static const struct mtk_clk_tree mt8188_pericfg_ao_clk_tree = { - .ext_clk_rates = ext_clock_rates, - .num_ext_clks = ARRAY_SIZE(ext_clock_rates), -}; - static const struct mtk_gate_regs imp_iic_wrap_cg_regs = { .set_ofs = 0xe08, .clr_ofs = 0xe04, @@ -1697,19 +1687,39 @@ static const struct mtk_gate imp_iic_wrap_en_clks[] = { GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_EN_AP_CLOCK_I2C6, CLK_TOP_I2C, 1), }; -const struct mtk_clk_tree mt8188_imp_iic_wrap_c_clk_tree = { +static const struct mtk_clk_tree mt8188_clk_tree = { .ext_clk_rates = ext_clock_rates, .num_ext_clks = ARRAY_SIZE(ext_clock_rates), }; -const struct mtk_clk_tree mt8188_imp_iic_wrap_w_clk_tree = { - .ext_clk_rates = ext_clock_rates, - .num_ext_clks = ARRAY_SIZE(ext_clock_rates), -}; - -const struct mtk_clk_tree mt8188_imp_iic_wrap_en_clk_tree = { - .ext_clk_rates = ext_clock_rates, - .num_ext_clks = ARRAY_SIZE(ext_clock_rates), +MTK_GATE_CLK_DATA(infracfg_ao_clks); +MTK_GATE_CLK_DATA(pericfg_ao_clks); +MTK_GATE_CLK_DATA(imp_iic_wrap_c_clks); +MTK_GATE_CLK_DATA(imp_iic_wrap_w_clks); +MTK_GATE_CLK_DATA(imp_iic_wrap_en_clks); + +static const struct udevice_id of_match_mt8188_clk_gate[] = { + { + .compatible = "mediatek,mt8188-infracfg-ao", + .data = (ulong)&infracfg_ao_clks_data + }, + { + .compatible = "mediatek,mt8188-pericfg-ao", + .data = (ulong)&pericfg_ao_clks_data + }, + { + .compatible = "mediatek,mt8188-imp-iic-wrap-c", + .data = (ulong)&imp_iic_wrap_c_clks_data + }, + { + .compatible = "mediatek,mt8188-imp-iic-wrap-w", + .data = (ulong)&imp_iic_wrap_w_clks_data + }, + { + .compatible = "mediatek,mt8188-imp-iic-wrap-en", + .data = (ulong)&imp_iic_wrap_en_clks_data + }, + { } }; static int mt8188_apmixedsys_probe(struct udevice *dev) @@ -1722,41 +1732,6 @@ static int mt8188_topckgen_probe(struct udevice *dev) return mtk_common_clk_init(dev, &mt8188_topckgen_clk_tree); } -static int mt8188_infracfg_ao_probe(struct udevice *dev) -{ - return mtk_common_clk_gate_init(dev, &mt8188_infracfg_ao_clk_tree, - infracfg_ao_clks, - ARRAY_SIZE(infracfg_ao_clks), 0); -} - -static int mt8188_pericfg_ao_probe(struct udevice *dev) -{ - return mtk_common_clk_gate_init(dev, &mt8188_pericfg_ao_clk_tree, - pericfg_ao_clks, - ARRAY_SIZE(pericfg_ao_clks), 0); -} - -static int mt8188_imp_iic_wrap_c_probe(struct udevice *dev) -{ - return mtk_common_clk_gate_init(dev, &mt8188_imp_iic_wrap_c_clk_tree, - imp_iic_wrap_c_clks, - ARRAY_SIZE(imp_iic_wrap_c_clks), 0); -} - -static int mt8188_imp_iic_wrap_w_probe(struct udevice *dev) -{ - return mtk_common_clk_gate_init(dev, &mt8188_imp_iic_wrap_w_clk_tree, - imp_iic_wrap_w_clks, - ARRAY_SIZE(imp_iic_wrap_w_clks), 0); -} - -static int mt8188_imp_iic_wrap_en_probe(struct udevice *dev) -{ - return mtk_common_clk_gate_init(dev, &mt8188_imp_iic_wrap_en_clk_tree, - imp_iic_wrap_en_clks, - ARRAY_SIZE(imp_iic_wrap_en_clks), 0); -} - static const struct udevice_id mt8188_apmixed_compat[] = { { .compatible = "mediatek,mt8188-apmixedsys", }, { } @@ -1767,30 +1742,16 @@ static const struct udevice_id mt8188_topckgen_compat[] = { { } }; -static const struct udevice_id mt8188_infracfg_ao_compat[] = { - { .compatible = "mediatek,mt8188-infracfg-ao", }, - { } -}; - -static const struct udevice_id mt8188_pericfg_ao_compat[] = { - { .compatible = "mediatek,mt8188-pericfg-ao", }, - { } -}; - -static const struct udevice_id mt8188_imp_iic_wrap_c_compat[] = { - { .compatible = "mediatek,mt8188-imp-iic-wrap-c", }, - { } -}; +static int mt8188_clk_gate_probe(struct udevice *dev) +{ + struct mtk_gate_clk_data *data; -static const struct udevice_id mt8188_imp_iic_wrap_w_compat[] = { - { .compatible = "mediatek,mt8188-imp-iic-wrap-w", }, - { } -}; + data = (void *)dev_get_driver_data(dev); -static const struct udevice_id mt8188_imp_iic_wrap_en_compat[] = { - { .compatible = "mediatek,mt8188-imp-iic-wrap-en", }, - { } -}; + return mtk_common_clk_gate_init(dev, &mt8188_clk_tree, + data->gates, data->num_gates, + data->gates[0].id); +} U_BOOT_DRIVER(mt8188_clk_apmixedsys) = { .name = "mt8188-apmixedsys", @@ -1814,51 +1775,11 @@ U_BOOT_DRIVER(mt8188_clk_topckgen) = { .flags = DM_FLAG_PRE_RELOC, }; -U_BOOT_DRIVER(mt8188_clk_infracfg_ao) = { - .name = "mt8188-infracfg-ao", - .id = UCLASS_CLK, - .of_match = mt8188_infracfg_ao_compat, - .probe = mt8188_infracfg_ao_probe, - .priv_auto = sizeof(struct mtk_cg_priv), - .ops = &mtk_clk_gate_ops, - .flags = DM_FLAG_PRE_RELOC, -}; - -U_BOOT_DRIVER(mt8188_clk_pericfg_ao) = { - .name = "mt8188-pericfg-ao", - .id = UCLASS_CLK, - .of_match = mt8188_pericfg_ao_compat, - .probe = mt8188_pericfg_ao_probe, - .priv_auto = sizeof(struct mtk_cg_priv), - .ops = &mtk_clk_gate_ops, - .flags = DM_FLAG_PRE_RELOC, -}; - -U_BOOT_DRIVER(mt8188_clk_imp_iic_wrap_c) = { - .name = "mt8188-imp_iic_wrap_c", - .id = UCLASS_CLK, - .of_match = mt8188_imp_iic_wrap_c_compat, - .probe = mt8188_imp_iic_wrap_c_probe, - .priv_auto = sizeof(struct mtk_cg_priv), - .ops = &mtk_clk_gate_ops, - .flags = DM_FLAG_PRE_RELOC, -}; - -U_BOOT_DRIVER(mt8188_clk_imp_iic_wrap_w) = { - .name = "mt8188-imp_iic_wrap_w", - .id = UCLASS_CLK, - .of_match = mt8188_imp_iic_wrap_w_compat, - .probe = mt8188_imp_iic_wrap_w_probe, - .priv_auto = sizeof(struct mtk_cg_priv), - .ops = &mtk_clk_gate_ops, - .flags = DM_FLAG_PRE_RELOC, -}; - -U_BOOT_DRIVER(mt8188_clk_imp_iic_wrap_en) = { - .name = "mt8188-imp_iic_wrap_en", +U_BOOT_DRIVER(mt8188_clk_gate) = { + .name = "mt8188-gate-clk", .id = UCLASS_CLK, - .of_match = mt8188_imp_iic_wrap_en_compat, - .probe = mt8188_imp_iic_wrap_en_probe, + .of_match = of_match_mt8188_clk_gate, + .probe = mt8188_clk_gate_probe, .priv_auto = sizeof(struct mtk_cg_priv), .ops = &mtk_clk_gate_ops, .flags = DM_FLAG_PRE_RELOC, -- 2.54.0
