On 7/10/26 10:52 AM, David Lechner wrote:
> On 7/10/26 9:12 AM, Julien Stephan wrote:
>> MT8188 currently declares a separate U_BOOT_DRIVER, mtk_clk_tree,
>> probe() function and compatible table for each clock gate controller,
>> despite all of them sharing the same implementation.
>>
>> Convert MT8188 to use the generic mtk_gate_clk_data infrastructure.
>> This allows all clock gate controllers to share a single generic
>> driver, eliminating duplicated code while preserving the existing
>> behaviour.
>>
>> No functional change intended.
>>
> Since the recent clock changes I made (still under review on list),
> I was hoping we could avoid using struct mtk_gate and
> mtk_common_clk_gate_init()
> in new code so we could eventually remove them. It should now be possible
> to use struct mtk_clk_tree and mtk_common_clk_init() instead with
> mtk_clk_topckgen_ops.
>
> So something like this (untested):
>
> ---
> diff --git a/drivers/clk/mediatek/clk-mt8188.c
> b/drivers/clk/mediatek/clk-mt8188.c
> index f73fa1fce95..84256ad5c5a 100644
> --- a/drivers/clk/mediatek/clk-mt8188.c
> +++ b/drivers/clk/mediatek/clk-mt8188.c
> @@ -1622,6 +1622,8 @@ static const struct mtk_gate infracfg_ao_clks[] = {
> static const struct mtk_clk_tree mt8188_infracfg_ao_clk_tree = {
> .ext_clk_rates = ext_clock_rates,
> .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
> + .gates = infracfg_ao_clks,
> + .num_gates = ARRAY_SIZE(infracfg_ao_clks),
> };
>
> static const struct mtk_gate_regs peri_ao_cg_regs = {
> @@ -1665,6 +1667,8 @@ static const struct mtk_gate pericfg_ao_clks[] = {
> static const struct mtk_clk_tree mt8188_pericfg_ao_clk_tree = {
> .ext_clk_rates = ext_clock_rates,
> .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
> + .gates = pericfg_ao_clks,
> + .num_gates = ARRAY_SIZE(pericfg_ao_clks),
> };
>
> static const struct mtk_gate_regs imp_iic_wrap_cg_regs = {
> @@ -1697,19 +1701,49 @@ static const struct mtk_gate imp_iic_wrap_en_clks[] =
> {
> GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_EN_AP_CLOCK_I2C6, CLK_TOP_I2C, 1),
> };
>
> -const struct mtk_clk_tree mt8188_imp_iic_wrap_c_clk_tree = {
> +static const struct mtk_clk_tree mt8188_imp_iic_wrap_c_clk_tree = {
> .ext_clk_rates = ext_clock_rates,
> .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
> + .gates = imp_iic_wrap_c_clks,
> + .num_gates = ARRAY_SIZE(imp_iic_wrap_c_clks),
> };
>
> -const struct mtk_clk_tree mt8188_imp_iic_wrap_w_clk_tree = {
> +static const struct mtk_clk_tree mt8188_imp_iic_wrap_w_clk_tree = {
> .ext_clk_rates = ext_clock_rates,
> .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
> + .gates = imp_iic_wrap_w_clks,
> + .num_gates = ARRAY_SIZE(imp_iic_wrap_w_clks),
> };
>
> -const struct mtk_clk_tree mt8188_imp_iic_wrap_en_clk_tree = {
> +static const struct mtk_clk_tree mt8188_imp_iic_wrap_en_clk_tree = {
> .ext_clk_rates = ext_clock_rates,
> .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
> + .gates = imp_iic_wrap_en_clks,
> + .num_gates = ARRAY_SIZE(imp_iic_wrap_en_clks),
> +};
> +
> +static const struct udevice_id of_match_mt8188_clk[] = {
> + {
> + .compatible = "mediatek,mt8188-infracfg-ao",
> + .data = (ulong)&mt8188_infracfg_ao_clk_tree
> + },
> + {
> + .compatible = "mediatek,mt8188-pericfg-ao",
> + .data = (ulong)&mt8188_pericfg_ao_clk_tree
> + },
> + {
> + .compatible = "mediatek,mt8188-imp-iic-wrap-c",
> + .data = (ulong)&mt8188_imp_iic_wrap_c_clk_tree
> + },
> + {
> + .compatible = "mediatek,mt8188-imp-iic-wrap-w",
> + .data = (ulong)&mt8188_imp_iic_wrap_w_clk_tree
> + },
> + {
> + .compatible = "mediatek,mt8188-imp-iic-wrap-en",
> + .data = (ulong)&mt8188_imp_iic_wrap_en_clk_tree
> + },
> + { }
> };
>
> static int mt8188_apmixedsys_probe(struct udevice *dev)
> @@ -1722,39 +1756,12 @@ static int mt8188_topckgen_probe(struct udevice *dev)
> return mtk_common_clk_init(dev, &mt8188_topckgen_clk_tree);
> }
>
> -static int mt8188_infracfg_ao_probe(struct udevice *dev)
> -{
> - return mtk_common_clk_gate_init(dev, &mt8188_infracfg_ao_clk_tree,
> - infracfg_ao_clks,
> - ARRAY_SIZE(infracfg_ao_clks), 0);
> -}
> -
> -static int mt8188_pericfg_ao_probe(struct udevice *dev)
> -{
> - return mtk_common_clk_gate_init(dev, &mt8188_pericfg_ao_clk_tree,
> - pericfg_ao_clks,
> - ARRAY_SIZE(pericfg_ao_clks), 0);
> -}
> -
> -static int mt8188_imp_iic_wrap_c_probe(struct udevice *dev)
> -{
> - return mtk_common_clk_gate_init(dev, &mt8188_imp_iic_wrap_c_clk_tree,
> - imp_iic_wrap_c_clks,
> - ARRAY_SIZE(imp_iic_wrap_c_clks), 0);
> -}
> -
> -static int mt8188_imp_iic_wrap_w_probe(struct udevice *dev)
> +/* REVISIT: could be made into a common function shared by all drivers. */
> +static int mt8188_clk_probe(struct udevice *dev)
> {
> - return mtk_common_clk_gate_init(dev, &mt8188_imp_iic_wrap_w_clk_tree,
> - imp_iic_wrap_w_clks,
> - ARRAY_SIZE(imp_iic_wrap_w_clks), 0);
> -}
> + struct mtk_clk_tree *tree = (void *)dev_get_driver_data(dev);
>
> -static int mt8188_imp_iic_wrap_en_probe(struct udevice *dev)
> -{
> - return mtk_common_clk_gate_init(dev, &mt8188_imp_iic_wrap_en_clk_tree,
> - imp_iic_wrap_en_clks,
> - ARRAY_SIZE(imp_iic_wrap_en_clks), 0);
> + return mtk_common_clk_init(dev, tree);
> }
>
> static const struct udevice_id mt8188_apmixed_compat[] = {
> @@ -1767,31 +1774,6 @@ static const struct udevice_id
> mt8188_topckgen_compat[] = {
> { }
> };
>
> -static const struct udevice_id mt8188_infracfg_ao_compat[] = {
> - { .compatible = "mediatek,mt8188-infracfg-ao", },
> - { }
> -};
> -
> -static const struct udevice_id mt8188_pericfg_ao_compat[] = {
> - { .compatible = "mediatek,mt8188-pericfg-ao", },
> - { }
> -};
> -
> -static const struct udevice_id mt8188_imp_iic_wrap_c_compat[] = {
> - { .compatible = "mediatek,mt8188-imp-iic-wrap-c", },
> - { }
> -};
> -
> -static const struct udevice_id mt8188_imp_iic_wrap_w_compat[] = {
> - { .compatible = "mediatek,mt8188-imp-iic-wrap-w", },
> - { }
> -};
> -
> -static const struct udevice_id mt8188_imp_iic_wrap_en_compat[] = {
> - { .compatible = "mediatek,mt8188-imp-iic-wrap-en", },
> - { }
> -};
> -
> U_BOOT_DRIVER(mt8188_clk_apmixedsys) = {
> .name = "mt8188-apmixedsys",
> .id = UCLASS_CLK,
> @@ -1814,52 +1796,12 @@ U_BOOT_DRIVER(mt8188_clk_topckgen) = {
> .flags = DM_FLAG_PRE_RELOC,
> };
>
> -U_BOOT_DRIVER(mt8188_clk_infracfg_ao) = {
> - .name = "mt8188-infracfg-ao",
> - .id = UCLASS_CLK,
> - .of_match = mt8188_infracfg_ao_compat,
> - .probe = mt8188_infracfg_ao_probe,
> - .priv_auto = sizeof(struct mtk_cg_priv),
> - .ops = &mtk_clk_gate_ops,
> - .flags = DM_FLAG_PRE_RELOC,
> -};
> -
> -U_BOOT_DRIVER(mt8188_clk_pericfg_ao) = {
> - .name = "mt8188-pericfg-ao",
> - .id = UCLASS_CLK,
> - .of_match = mt8188_pericfg_ao_compat,
> - .probe = mt8188_pericfg_ao_probe,
> - .priv_auto = sizeof(struct mtk_cg_priv),
> - .ops = &mtk_clk_gate_ops,
> - .flags = DM_FLAG_PRE_RELOC,
> -};
> -
> -U_BOOT_DRIVER(mt8188_clk_imp_iic_wrap_c) = {
> - .name = "mt8188-imp_iic_wrap_c",
> - .id = UCLASS_CLK,
> - .of_match = mt8188_imp_iic_wrap_c_compat,
> - .probe = mt8188_imp_iic_wrap_c_probe,
> - .priv_auto = sizeof(struct mtk_cg_priv),
> - .ops = &mtk_clk_gate_ops,
> - .flags = DM_FLAG_PRE_RELOC,
> -};
> -
> -U_BOOT_DRIVER(mt8188_clk_imp_iic_wrap_w) = {
> - .name = "mt8188-imp_iic_wrap_w",
> +U_BOOT_DRIVER(mt8188_clk) = {
> + .name = "mt8188-clk",
> .id = UCLASS_CLK,
> - .of_match = mt8188_imp_iic_wrap_w_compat,
> - .probe = mt8188_imp_iic_wrap_w_probe,
> - .priv_auto = sizeof(struct mtk_cg_priv),
> - .ops = &mtk_clk_gate_ops,
> - .flags = DM_FLAG_PRE_RELOC,
> -};
> -
> -U_BOOT_DRIVER(mt8188_clk_imp_iic_wrap_en) = {
> - .name = "mt8188-imp_iic_wrap_en",
> - .id = UCLASS_CLK,
> - .of_match = mt8188_imp_iic_wrap_en_compat,
> - .probe = mt8188_imp_iic_wrap_en_probe,
> - .priv_auto = sizeof(struct mtk_cg_priv),
> - .ops = &mtk_clk_gate_ops,
> + .of_match = of_match_mt8188_clk,
> + .probe = mt8188_clk_probe,
> + .priv_auto = sizeof(struct mtk_clk_priv),
> + .ops = &mtk_clk_topckgen_ops,
> .flags = DM_FLAG_PRE_RELOC,
> };
>
And on top of this, even...
---
diff --git a/drivers/clk/mediatek/clk-mt8188.c
b/drivers/clk/mediatek/clk-mt8188.c
index 84256ad5c5a..5a2deb4102b 100644
--- a/drivers/clk/mediatek/clk-mt8188.c
+++ b/drivers/clk/mediatek/clk-mt8188.c
@@ -1746,16 +1746,6 @@ static const struct udevice_id of_match_mt8188_clk[] = {
{ }
};
-static int mt8188_apmixedsys_probe(struct udevice *dev)
-{
- return mtk_common_clk_init(dev, &mt8188_apmixedsys_clk_tree);
-}
-
-static int mt8188_topckgen_probe(struct udevice *dev)
-{
- return mtk_common_clk_init(dev, &mt8188_topckgen_clk_tree);
-}
-
/* REVISIT: could be make a common function shared by all drivers. */
static int mt8188_clk_probe(struct udevice *dev)
{
@@ -1765,12 +1755,18 @@ static int mt8188_clk_probe(struct udevice *dev)
}
static const struct udevice_id mt8188_apmixed_compat[] = {
- { .compatible = "mediatek,mt8188-apmixedsys", },
+ {
+ .compatible = "mediatek,mt8188-apmixedsys",
+ .data = (ulong)&mt8188_apmixedsys_clk_tree
+ },
{ }
};
static const struct udevice_id mt8188_topckgen_compat[] = {
- { .compatible = "mediatek,mt8188-topckgen", },
+ {
+ .compatible = "mediatek,mt8188-topckgen",
+ .data = (ulong)&mt8188_topckgen_clk_tree
+ },
{ }
};
@@ -1779,7 +1775,7 @@ U_BOOT_DRIVER(mt8188_clk_apmixedsys) = {
.id = UCLASS_CLK,
.of_match = mt8188_apmixed_compat,
.bind = mtk_common_clk_parent_bind,
- .probe = mt8188_apmixedsys_probe,
+ .probe = mt8188_clk_probe,
.priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_apmixedsys_ops,
.flags = DM_FLAG_PRE_RELOC,
@@ -1790,7 +1786,7 @@ U_BOOT_DRIVER(mt8188_clk_topckgen) = {
.id = UCLASS_CLK,
.of_match = mt8188_topckgen_compat,
.bind = mtk_common_clk_parent_bind,
- .probe = mt8188_topckgen_probe,
+ .probe = mt8188_clk_probe,
.priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_topckgen_ops,
.flags = DM_FLAG_PRE_RELOC,
