Add clock tree type flags to the mt7629 clock tree structures. These
will be used later for parent lookup.

Clock trees had to be split now that each tree has a different type
flag.

Signed-off-by: David Lechner <[email protected]>
---
 drivers/clk/mediatek/clk-mt7629.c | 24 +++++++++++++++++++-----
 1 file changed, 19 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt7629.c 
b/drivers/clk/mediatek/clk-mt7629.c
index 74510ee36a9..903e9d8ec81 100644
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -575,20 +575,32 @@ static const struct mtk_gate ssusb_cgs[] = {
        GATE_SSUSB(CLK_SSUSB_DMA_EN, CLK_TOP_TO_USB3_DMA, 8),
 };
 
-static const struct mtk_clk_tree mt7629_clk_tree = {
+static const struct mtk_clk_tree mt7629_apmixed_clk_tree = {
        .pll_parent = EXT_PARENT(CLK_PAD_CLK20M),
+       .ext_clk_rates = ext_clock_rates,
+       .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
+       .plls = apmixed_plls,
+       .num_plls = ARRAY_SIZE(apmixed_plls),
+       .type = MTK_CLK_TREE_APMIXED,
+};
+
+static const struct mtk_clk_tree mt7629_topckgen_clk_tree = {
        .ext_clk_rates = ext_clock_rates,
        .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
        .fdivs_offs = CLK_TOP_TO_USB3_SYS,
        .muxes_offs = CLK_TOP_AXI_SEL,
-       .plls = apmixed_plls,
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
-       .num_plls = ARRAY_SIZE(apmixed_plls),
        .num_fclks = ARRAY_SIZE(top_fixed_clks),
        .num_fdivs = ARRAY_SIZE(top_fixed_divs),
        .num_muxes = ARRAY_SIZE(top_muxes),
+       .type = MTK_CLK_TREE_TOPCKGEN,
+};
+
+static const struct mtk_clk_tree mt7629_clk_tree = {
+       .ext_clk_rates = ext_clock_rates,
+       .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
 };
 
 static const struct mtk_clk_tree mt7629_peri_clk_tree = {
@@ -628,7 +640,7 @@ static int mt7629_apmixedsys_probe(struct udevice *dev)
        struct mtk_clk_priv *priv = dev_get_priv(dev);
        int ret;
 
-       ret = mtk_common_clk_init(dev, &mt7629_clk_tree);
+       ret = mtk_common_clk_init(dev, &mt7629_apmixed_clk_tree);
        if (ret)
                return ret;
 
@@ -642,7 +654,7 @@ static int mt7629_apmixedsys_probe(struct udevice *dev)
 
 static int mt7629_topckgen_probe(struct udevice *dev)
 {
-       return mtk_common_clk_init(dev, &mt7629_clk_tree);
+       return mtk_common_clk_init(dev, &mt7629_topckgen_clk_tree);
 }
 
 static int mt7629_infracfg_probe(struct udevice *dev)
@@ -740,6 +752,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
        .name = "mt7629-clock-apmixedsys",
        .id = UCLASS_CLK,
        .of_match = mt7629_apmixed_compat,
+       .bind = mtk_common_clk_parent_bind,
        .probe = mt7629_apmixedsys_probe,
        .priv_auto      = sizeof(struct mtk_clk_priv),
        .ops = &mtk_clk_apmixedsys_ops,
@@ -750,6 +763,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = {
        .name = "mt7629-clock-topckgen",
        .id = UCLASS_CLK,
        .of_match = mt7629_topckgen_compat,
+       .bind = mtk_common_clk_parent_bind,
        .probe = mt7629_topckgen_probe,
        .priv_auto      = sizeof(struct mtk_clk_priv),
        .ops = &mtk_clk_topckgen_ops,

-- 
2.43.0

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