On 7/21/26 6:21 PM, Aristo Chen wrote:
> The phyCORE AM62x, AM62Ax and AM64x u-boot FIT images carry four
> devicetree overlays (som-no-rtc, som-no-spi, som-no-eth, som-qspi)
> that SPL loads simultaneously as loadables of the same configuration.
> Their load addresses are spaced only 4 KiB apart, but each packaged
> image is larger than that. Measured on a phycore_am62x build, every
> overlay is between 6035 and 6163 bytes including the prepended
> ti-secure certificate, and the raw dtbo that remains in memory after
> the certificate is stripped is still around 4.2 to 4.4 KiB.
>
> Loading the images back to back therefore overwrites the tail of the
> previously loaded overlay, so by the time the board code applies the
> overlays from the recorded /fit-images addresses the earlier ones are
> already corrupted.
>
> Space the overlay slots 16 KiB apart so each image has comfortable
> headroom. The addresses are only consumed through the /fit-images
> records that SPL writes while loading the images, so no other code
> needs to change. This also allows the upcoming mkimage load address
> overlap check to pass for these boards.
>
> Signed-off-by: Aristo Chen <[email protected]>
Tested-by: Wadim Egorov <[email protected]>
Thanks! Interestingly, I never hit any visible errors. The overlay mechanism
appeared to work and the nodes were removed from the kernel devicetree as
expected.
> ---
> arch/arm/dts/k3-am625-phycore-som-binman.dtsi | 6 +++---
> arch/arm/dts/k3-am62a-phycore-som-binman.dtsi | 6 +++---
> arch/arm/dts/k3-am642-phycore-som-binman.dtsi | 6 +++---
> 3 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/dts/k3-am625-phycore-som-binman.dtsi
> b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi
> index 6d57a5d9ffa..d0eaa7dd992 100644
> --- a/arch/arm/dts/k3-am625-phycore-som-binman.dtsi
> +++ b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi
> @@ -368,7 +368,7 @@
> description =
> "k3-am6xx-phycore-disable-spi-nor";
> type = "flat_dt";
> compression = "none";
> - load = <0x8F001000>;
> + load = <0x8F004000>;
> arch = "arm";
> ti-secure {
> content =
> <&am6xx_phycore_disable_spi_not_dtbo>;
> @@ -383,7 +383,7 @@
> description =
> "k3-am6xx-phycore-disable-eth-phy";
> type = "flat_dt";
> compression = "none";
> - load = <0x8F002000>;
> + load = <0x8F008000>;
> arch = "arm";
> ti-secure {
> content =
> <&am6xx_phycore_disable_eth_phy_dtbo>;
> @@ -398,7 +398,7 @@
> description =
> "k3-am6xx-phycore-qspi-nor";
> type = "flat_dt";
> compression = "none";
> - load = <0x8F003000>;
> + load = <0x8F00C000>;
> arch = "arm";
> ti-secure {
> content =
> <&am6xx_phycore_disable_qspi_nor_dtbo>;
> diff --git a/arch/arm/dts/k3-am62a-phycore-som-binman.dtsi
> b/arch/arm/dts/k3-am62a-phycore-som-binman.dtsi
> index cdc9a100a04..2c98e16b00b 100644
> --- a/arch/arm/dts/k3-am62a-phycore-som-binman.dtsi
> +++ b/arch/arm/dts/k3-am62a-phycore-som-binman.dtsi
> @@ -295,7 +295,7 @@
> description =
> "k3-am6xx-phycore-disable-spi-nor";
> type = "flat_dt";
> compression = "none";
> - load = <0x8F001000>;
> + load = <0x8F004000>;
> arch = "arm";
> ti-secure {
> content =
> <&am6xx_phycore_disable_spi_not_dtbo>;
> @@ -310,7 +310,7 @@
> description =
> "k3-am6xx-phycore-disable-eth-phy";
> type = "flat_dt";
> compression = "none";
> - load = <0x8F002000>;
> + load = <0x8F008000>;
> arch = "arm";
> ti-secure {
> content =
> <&am6xx_phycore_disable_eth_phy_dtbo>;
> @@ -325,7 +325,7 @@
> description =
> "k3-am6xx-phycore-qspi-nor";
> type = "flat_dt";
> compression = "none";
> - load = <0x8F003000>;
> + load = <0x8F00C000>;
> arch = "arm";
> ti-secure {
> content =
> <&am6xx_phycore_disable_qspi_nor_dtbo>;
> diff --git a/arch/arm/dts/k3-am642-phycore-som-binman.dtsi
> b/arch/arm/dts/k3-am642-phycore-som-binman.dtsi
> index 07cb79fd04a..64679195e72 100644
> --- a/arch/arm/dts/k3-am642-phycore-som-binman.dtsi
> +++ b/arch/arm/dts/k3-am642-phycore-som-binman.dtsi
> @@ -402,7 +402,7 @@
> description =
> "k3-am6xx-phycore-disable-spi-nor";
> type = "flat_dt";
> compression = "none";
> - load = <0x8F001000>;
> + load = <0x8F004000>;
> arch = "arm";
> ti-secure {
> content =
> <&am6xx_phycore_disable_spi_not_dtbo>;
> @@ -417,7 +417,7 @@
> description =
> "k3-am6xx-phycore-disable-eth-phy";
> type = "flat_dt";
> compression = "none";
> - load = <0x8F002000>;
> + load = <0x8F008000>;
> arch = "arm";
> ti-secure {
> content =
> <&am6xx_phycore_disable_eth_phy_dtbo>;
> @@ -432,7 +432,7 @@
> description =
> "k3-am6xx-phycore-qspi-nor";
> type = "flat_dt";
> compression = "none";
> - load = <0x8F003000>;
> + load = <0x8F00C000>;
> arch = "arm";
> ti-secure {
> content =
> <&am6xx_phycore_disable_qspi_nor_dtbo>;
