Hi Jonas, On 2026-08-04T00:26:39, Jonas Karlman <[email protected]> wrote: > clk: rockchip: rk3576: Always init clocks in SPL build
> > The ore PLLs are only initialized in SPL on RK3576. Typo — ore should be core. > > The ore PLLs are only initialized in SPL on RK3576. > > Ensure clock driver is always probed after bind for SPL builds to > initialize core PLLs and clocks in SPL phase on RK3576. > > Signed-off-by: Jonas Karlman <[email protected]> > Tested-by: Alexey Charkov <[email protected]> > > drivers/clk/rockchip/clk_rk3576.c | 4 ++++ > 1 file changed, 4 insertions(+) Reviewed-by: Simon Glass <[email protected]> Regards, Simon
