On Thu, Oct 01, 2026 at 10:47:27PM +0200, Vincent Jardin wrote:
> +static int sd1_enter_40g4x10g(unsigned long base)
> +{
> + unsigned long lanes = SD1_LNE_LNH;
> + int m, keep, ret, err;
> +
> + keep = sd1_port_master(base, SD1_LNA_LND);
> + if (keep < 0)
> + return -EINVAL;
> +
> + ret = sd1_halt_port(base, lanes);
> + if (ret == -EINVAL)
> + return ret;
> +
> + for_each_set_bit(m, &lanes, SRDS_LANES)
> + out_le32((void __iomem *)SRDS_LNmGCR0(base, m), XFI_GCR0);
> +
> + out_le32((void __iomem *)SRDS_PCCE(base), X10G_PCCE);
> + out_le32((void __iomem *)SRDS_PCCC(base), XFI_PCCC);
> +
> + err = sd1_reset_both(base, keep);
When entering 40g4x10g from 2x40g, why do you need to reset both lane
groups rather than just lanes E-H?
> +
> + return err ? err : ret;
> +}
