Commit fd1ba2965244 ("drivers: clk: Fix using assigned-clocks in the
node of the clock it sets up"), first included in v2020.01-rc2, added
a clock-uclass post_probe() hook that applies clock controllers own
assigned clocks.
Remove the redundant clk_set_defaults() call from the RK3588 clock
driver probe() ops. Also remove the unused sync_kernel field that only
recorded whether assigned clocks had been applied.
Fixes: 7a474df74023 ("clk: rockchip: Add rk3588 clk support")
Signed-off-by: Jonas Karlman <[email protected]>
---
arch/arm/include/asm/arch-rockchip/cru_rk3588.h | 1 -
drivers/clk/rockchip/clk_rk3588.c | 11 +----------
2 files changed, 1 insertion(+), 11 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
index 85cc17840436..1058fbc19dc2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h
@@ -50,7 +50,6 @@ struct rk3588_clk_priv {
ulong armclk_hz;
ulong armclk_enter_hz;
ulong armclk_init_hz;
- bool sync_kernel;
bool set_armclk_rate;
};
diff --git a/drivers/clk/rockchip/clk_rk3588.c
b/drivers/clk/rockchip/clk_rk3588.c
index fe3fc695c15f..51c863a7bfe3 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1958,9 +1958,7 @@ static void rk3588_clk_init(struct rk3588_clk_priv *priv)
static int rk3588_clk_probe(struct udevice *dev)
{
struct rk3588_clk_priv *priv = dev_get_priv(dev);
- int ret;
-
- priv->sync_kernel = false;
+ __maybe_unused int ret;
#ifdef CONFIG_XPL_BUILD
rockchip_pll_set_rate(&rk3588_pll_clks[B0PLL], priv->cru,
@@ -1979,13 +1977,6 @@ static int rk3588_clk_probe(struct udevice *dev)
rk3588_clk_init(priv);
- /* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
- ret = clk_set_defaults(dev, 1);
- if (ret)
- debug("%s clk_set_defaults failed %d\n", __func__, ret);
- else
- priv->sync_kernel = true;
-
return 0;
}
--
2.55.0