On 16/10/2026 12:40 pm, Chen Huei Lok wrote:
From: Tien Fong Chee <[email protected]>
Klocwork reported a potential value overflow from an incorrect typecast.
It cannot actually happen here because the result never exceeds 32 bits,
but correct the casting of the reset-status register read for the sake of
good coding practice.
Signed-off-by: Tien Fong Chee <[email protected]>
Signed-off-by: Chen Huei Lok <[email protected]>
---
drivers/ddr/altera/sdram_n5x.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c
index 43d654341cc..d1f0a0d312e 100644
--- a/drivers/ddr/altera/sdram_n5x.c
+++ b/drivers/ddr/altera/sdram_n5x.c
@@ -2869,9 +2869,9 @@ int sdram_mmr_init_full(struct udevice *dev)
* subsystem in complete reset state before init DDR clock
* and DDR controller
*/
- ret = wait_for_bit_le32((const void *)((uintptr_t)(readl
+ ret = wait_for_bit_le32((const void *)((uintptr_t)readl
(ddr_handoff_info.mem_reset_base) +
- MEM_RST_MGR_STATUS)),
+ MEM_RST_MGR_STATUS),
MEM_RST_MGR_STATUS_RESET_COMPLETE,
true, TIMEOUT_200MS, false);
if (ret) {
@@ -2894,8 +2894,8 @@ int sdram_mmr_init_full(struct udevice *dev)
/* Release the controller from reset */
setbits_le32((uintptr_t)
- (readl(ddr_handoff_info.mem_reset_base) +
- MEM_RST_MGR_STATUS), MEM_RST_MGR_STATUS_AXI_RST |
+ readl(ddr_handoff_info.mem_reset_base) +
+ MEM_RST_MGR_STATUS, MEM_RST_MGR_STATUS_AXI_RST |
MEM_RST_MGR_STATUS_CONTROLLER_RST |
MEM_RST_MGR_STATUS_RESET_COMPLETE);
Reviewed-by: Tien Fong Chee <[email protected]>
Best regards,
Tien Fong
