"Esztermann, Ansgar" <[email protected]> writes:
> On Mar 7, 2011, at 15:09 , Reuti wrote:
>
>> Am 07.03.2011 um 14:42 schrieb Esztermann, Ansgar:
>>
>>> Hi List,
>>>
>>> is anyone using the core binding feature on AMD Magny-Cours? If so, how do
>>> you do it? For me, loadcheck mis-reads the topology as
>>> (SCTTCTTCTTCTTCTTCTT)*4 rather than (SCCCCCCCCCCCC)*4. As far as I can
>>> tell, there are two problems:
>>> - the kernel (2.6.18-194.26.1.el5) only exposes core_id and
>>> physical_package_id for each core, with core_id running from 0 to 5 and
>>> physical_package_id from 1 to 4. However, there are two dice (nodes) per
>>> socket, but this is not shown in the device tree.
>>
>> Confirmed. But I wonder, whether it's SGE's fault. Why does the kernel
>> ouptut the same core id, although it's not the same core?
>
> Well, core IDs are unique only within the same socket ID (for older CPUs, say
> Harpertown), so I would assume the same holds for node IDs -- it's just that
> node IDs aren't displayed for Magny-Cours.
What exactly would you expect? hwloc's lstopo(1) gives the following
under current RedHat 5 (Linux 2.6.18-238.5.1.el5) on a Supermicro H8DGT
(Opteron 6134). It seems to have the information exposed, but I'm not
sure how it should be. (I guess GE should move to hwloc rather than
PLPA, which is now deprecated and not maintained.)
Machine (63GB)
Socket #0 (32GB)
NUMANode #0 (phys=0 16GB) + L3 #0 (5118KB)
L2 #0 (512KB) + L1 #0 (64KB) + Core #0 + PU #0 (phys=0)
L2 #1 (512KB) + L1 #1 (64KB) + Core #1 + PU #1 (phys=1)
L2 #2 (512KB) + L1 #2 (64KB) + Core #2 + PU #2 (phys=2)
L2 #3 (512KB) + L1 #3 (64KB) + Core #3 + PU #3 (phys=3)
NUMANode #1 (phys=1 16GB) + L3 #1 (5118KB)
L2 #4 (512KB) + L1 #4 (64KB) + Core #4 + PU #4 (phys=4)
L2 #5 (512KB) + L1 #5 (64KB) + Core #5 + PU #5 (phys=5)
L2 #6 (512KB) + L1 #6 (64KB) + Core #6 + PU #6 (phys=6)
L2 #7 (512KB) + L1 #7 (64KB) + Core #7 + PU #7 (phys=7)
Socket #1 (32GB)
NUMANode #2 (phys=3 16GB) + L3 #2 (5118KB)
L2 #8 (512KB) + L1 #8 (64KB) + Core #8 + PU #8 (phys=8)
L2 #9 (512KB) + L1 #9 (64KB) + Core #9 + PU #9 (phys=9)
L2 #10 (512KB) + L1 #10 (64KB) + Core #10 + PU #10 (phys=10)
L2 #11 (512KB) + L1 #11 (64KB) + Core #11 + PU #11 (phys=11)
NUMANode #3 (phys=2 16GB) + L3 #3 (5118KB)
L2 #12 (512KB) + L1 #12 (64KB) + Core #12 + PU #12 (phys=12)
L2 #13 (512KB) + L1 #13 (64KB) + Core #13 + PU #13 (phys=13)
L2 #14 (512KB) + L1 #14 (64KB) + Core #14 + PU #14 (phys=14)
L2 #15 (512KB) + L1 #15 (64KB) + Core #15 + PU #15 (phys=15)
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