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Today's Topics:
1. Re: Gain distribution for RFX900 (Gonzalo Flores De La Parra)
2. unrecognized WBX daughterboard in B100 under Windows 7
(Iliya Voronov)
3. Re: TX/RX protections (Matt Ettus)
4. Re: questions about the antenna LP0965 (Matt Ettus)
5. Re: unrecognized WBX daughterboard in B100 under Windows 7
([email protected])
6. Re: Addressing custom logic in fpga (Diego Montemayor)
7. USRP N210 revision number ([email protected])
8. Re: USRP N210 revision number (Nick Foster)
9. Re: USRP N210 revision number (Josh Blum)
10. Re: USRP N210 revision number ([email protected])
11. USRP Tx interpolation factor (Invizible Box)
----------------------------------------------------------------------
Message: 1
Date: Wed, 13 Feb 2013 12:20:01 -0600
From: Gonzalo Flores De La Parra <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] Gain distribution for RFX900
Message-ID:
<CACWyxXDsCmoP=-u26pzw0ldtossfq0vwczgpapy-axho8ei...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
thanks a lot, i will take a look and try to modify the automatic
distribution and see how this works for my tests
--
Ing. Gonzalo Flores De La Parra
Electr?nica en Comunicaciones
Universidad Aut?noma Metropolitana
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Message: 2
Date: Wed, 13 Feb 2013 22:43:32 +0400
From: Iliya Voronov <[email protected]>
To: [email protected]
Subject: [USRP-users] unrecognized WBX daughterboard in B100 under
Windows 7
Message-ID: <[email protected]>
Content-Type: text/plain; charset=UTF-8; format=flowed
Hi, all,
I am trying to use USRP B100 and WBX under Windows 7. Received signal is
always zero with any carrier freq, sample rate, gain etc. uhd_usrp_probe
can not correctly recognize the daughterboard, full output is listed below.
It always happens at fast machine under 64-bit Windows 7 and it happens
in most cases at slow machine under 32-bit Windows 7. Very rarely at
slow 32-bit machine, uhd_usrp_probe correctly detect WBX frontend, but
received signal is still zero.
UHD and GNU Radio are installed according to wiki guide, latest stable
release. USRP B100 and WBX are just from the box.
C:\Users\iliya>uhd_usrp_probe
Win32; Microsoft Visual C++ version 10.0; Boost_104700;
UHD_003.005.001-release
-- USRP-B100 clock control: 10
-- r_counter: 2
-- a_counter: 0
-- b_counter: 20
-- prescaler: 8
-- vco_divider: 5
-- chan_divider: 5
-- vco_rate: 1600.000000MHz
-- chan_rate: 320.000000MHz
-- out_rate: 64.000000MHz
--
UHD Error:
The daughterboard manager encountered a recoverable error in init.
Loading the "unknown" daughterboard implementations to continue.
The daughterboard cannot operate until this error is resolved.
RuntimeError: fifo ctrl timed out getting a send buffer
_____________________________________________________
/
| Device: B-Series Device
| _____________________________________________________
| /
| | Mboard: B100
| | revision: 8192
| | serial: E3R11Y1B1
| | FPGA Version: 11.1
| |
| | Time sources: none, external, _external_
| | Clock sources: internal, external, auto
| | Sensors: ref_locked
| | _____________________________________________________
| | /
| | | RX DSP: 0
| | | Freq range: -32.000 to 32.000 Mhz
| | _____________________________________________________
| | /
| | | RX Dboard: A
| | | ID: WBX, WBX + Simple GDB (0x0053)
| | | _____________________________________________________
| | | /
| | | | RX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 Mhz
| | | | Gain Elements: None
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | RX Codec: A
| | | | Name: ad9522
| | | | Gain range pga: 0.0 to 20.0 step 1.0 dB
| | _____________________________________________________
| | /
| | | TX DSP: 0
| | | Freq range: -32.000 to 32.000 Mhz
| | _____________________________________________________
| | /
| | | TX Dboard: A
| | | ID: WBX (0x0052)
| | | _____________________________________________________
| | | /
| | | | TX Frontend: 0
| | | | Name: Unknown (0xffff) - 0
| | | | Antennas:
| | | | Sensors:
| | | | Freq range: 0.000 to 0.000 Mhz
| | | | Gain Elements: None
| | | | Connection Type: IQ
| | | | Uses LO offset: No
| | | _____________________________________________________
| | | /
| | | | TX Codec: A
| | | | Name: ad9522
| | | | Gain range pga: -20.0 to 0.0 step 0.1 dB
Iliya
------------------------------
Message: 3
Date: Wed, 13 Feb 2013 11:03:32 -0800
From: Matt Ettus <[email protected]>
To: Jeff Scaparra <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] TX/RX protections
Message-ID:
<CAN=1kn_2f=vh1_s5wys5xgc1psxafh6j1xr2j3qwksyftep...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
To TX and RX on the same antenna you do not need to do anything special,
assuming you are not transmitting and receiving at the same time. If you
wish to TX and RX simultaneously (i.e. FDD) you need to use separate
antenna ports and use an external duplexer.
Matt
On Fri, Feb 8, 2013 at 5:32 PM, Jeff Scaparra <[email protected]> wrote:
> What protections if any do I need to ensure I have in place to allow for
> TX and RX on the same antenna.
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
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Message: 4
Date: Wed, 13 Feb 2013 11:07:00 -0800
From: Matt Ettus <[email protected]>
To: gang li <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] questions about the antenna LP0965
Message-ID:
<CAN=1kn9A5ZJm3RbtgHYPLwfp7yzhCHb+R9rNB1N0t=if2xh...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
The datasheet for that antenna is here:
http://www.wa5vjb.com/pcb-pdfs/LP8565.pdf
If you need further info on it, Kent would be the people to ask.
Matt
On Wed, Feb 6, 2013 at 7:38 PM, gang li <[email protected]> wrote:
> Hi, guys,
>
> I have some questions about the antenna LP0965 purchased fromEttus. I
> know it is made by Kent Electronics. Should i contact Kent or
> justEttus? Thanks.
>
> Best,
> Gang
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
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Message: 5
Date: Wed, 13 Feb 2013 14:10:18 -0500
From: [email protected]
To: <[email protected]>
Subject: Re: [USRP-users] unrecognized WBX daughterboard in B100 under
Windows 7
Message-ID: <[email protected]>
Content-Type: text/plain; charset="utf-8"
On 13 Feb 2013 13:43, Iliya Voronov wrote:
> Hi, all,
>
> I am
trying to use USRP B100 and WBX under Windows 7. Received signal is
>
always zero with any carrier freq, sample rate, gain etc.
uhd_usrp_probe
> can not correctly recognize the daughterboard, full
output is listed below.
> It always happens at fast machine under 64-bit
Windows 7 and it happens
> in most cases at slow machine under 32-bit
Windows 7. Very rarely at
> slow 32-bit machine, uhd_usrp_probe
correctly detect WBX frontend, but
> received signal is still zero.
>
UHD and GNU Radio are installed according to wiki guide, latest stable
>
release. USRP B100 and WBX are just from the box.
>
>
C:Usersiliya>uhd_usrp_probe
> Win32; Microsoft Visual C++ version 10.0;
Boost_104700;
> UHD_003.005.001-release
I would check to make sure that
your WBX is correctly seated in the connectors, and that there are no
bent/broken pins.
If that doesn't resolve it, send a note to
[email protected]
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Message: 6
Date: Wed, 13 Feb 2013 16:41:38 -0500
From: Diego Montemayor <[email protected]>
To: Johnathan Corgan <[email protected]>
Cc: "[email protected] forum" <[email protected]>
Subject: Re: [USRP-users] Addressing custom logic in fpga
Message-ID:
<CANRCeV2+3Uf+ksXvLqL3YphAN5K9JxGko32Y7XO+=08rr4+...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
Thanks, this is what I was looking for.
On Wed, Feb 13, 2013 at 8:57 AM, Johnathan Corgan
<[email protected]>wrote:
> On Tue, Feb 12, 2013 at 10:40 PM, Ian Buckley <[email protected]>wrote:
>
>
>> If you do ever add further logic to the Verilog and find you are running
>> short off address space, then it is quite simple to add a new settings_bus
>> bridge, identical to the existing one to one of the unused Wishbone bus
>> slave locations so that you have an entire new settings bus to use.
>>
>
> There is already a dedicated settings bus in place specifically for use in
> custom designs, which allows the user to create up to 256 32-bit write-only
> configuration registers that exist outside the address space of the
> standard settings bus.
>
> In the top level module (e.g., u2plus_core.v), there are wires
> 'set_addr_user', 'set_data_user', and 'set_stb_user', with the same
> semantics as the standard configuration bus. To use these in a custom
> design, one creates new instances of 'settings_reg' but connects their
> inputs to this set of wires instead.
>
> To initiate a write cycle, from the host UHD interface one issues a call
> to:
>
> void set_user_register(const boost::uint8_t addr, const boost::uint32_t
> data, size_t mboard = ALL_MBOARDS)
>
> ...from an instance of uhd::usrp::multi_usrp. This call is also part of
> the GNU Radio UHD source and sink blocks.
>
> Johnathan
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
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Message: 7
Date: Thu, 14 Feb 2013 00:17:45 +0000
From: [email protected]
To: [email protected]
Subject: [USRP-users] USRP N210 revision number
Message-ID: <[email protected]>
Content-Type: text/plain; charset=US-ASCII
I have to use an N210 for the first time, and I need to determine the revision
number to load the correct FPGA images
Unfortunately we had to buy the device via National Instruments in the UK -
long story.... And so the box only has a National Instrument sticker on the
back , which calls an N210 + WBX an 'NI USRP-2920' NO revision number
I've looked in the box, the WBX says rev 3.0, but I can't see anything on the
PCB (unless it's on the underside - don't want to totally strip it (yet))
I have photographed the main chip numbers - does anyone know what changed rev 2
to 3 to 4 - or how to determine this by software. (I'm trying *not* to brick
the device in my first 24h - I don't have any access to jtag kit to recover
it:-)
I need to load the normal ettus fpga code for gnuradio - I believe it currently
holds the NI labview code
Many thanks
--David
------------------------------
Message: 8
Date: Wed, 13 Feb 2013 16:26:27 -0800
From: Nick Foster <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] USRP N210 revision number
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
On 02/13/2013 04:17 PM, [email protected] wrote:
> I have to use an N210 for the first time, and I need to determine the
> revision number to load the correct FPGA images
>
> Unfortunately we had to buy the device via National Instruments in the UK -
> long story.... And so the box only has a National Instrument sticker on the
> back , which calls an N210 + WBX an 'NI USRP-2920' NO revision number
>
> I've looked in the box, the WBX says rev 3.0, but I can't see anything on the
> PCB (unless it's on the underside - don't want to totally strip it (yet))
>
> I have photographed the main chip numbers - does anyone know what changed rev
> 2 to 3 to 4 - or how to determine this by software. (I'm trying *not* to
> brick the device in my first 24h - I don't have any access to jtag kit to
> recover it:-)
>
> I need to load the normal ettus fpga code for gnuradio - I believe it
> currently holds the NI labview code
It's a rev 4. Thanks for asking. =)
--n
>
> Many thanks
>
> --David
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
------------------------------
Message: 9
Date: Wed, 13 Feb 2013 18:28:43 -0600
From: Josh Blum <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] USRP N210 revision number
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1
On 02/13/2013 06:26 PM, Nick Foster wrote:
> On 02/13/2013 04:17 PM, [email protected] wrote:
>> I have to use an N210 for the first time, and I need to determine the
>> revision number to load the correct FPGA images
>>
>> Unfortunately we had to buy the device via National Instruments in the
>> UK - long story.... And so the box only has a National Instrument
>> sticker on the back , which calls an N210 + WBX an 'NI USRP-2920' NO
>> revision number
>>
>> I've looked in the box, the WBX says rev 3.0, but I can't see anything
>> on the PCB (unless it's on the underside - don't want to totally strip
>> it (yet))
>>
>> I have photographed the main chip numbers - does anyone know what
>> changed rev 2 to 3 to 4 - or how to determine this by software. (I'm
>> trying *not* to brick the device in my first 24h - I don't have any
>> access to jtag kit to recover it:-)
>>
>> I need to load the normal ettus fpga code for gnuradio - I believe it
>> currently holds the NI labview code
> It's a rev 4. Thanks for asking. =)
>
Also, if you run uhd_usrp_probe from a recent version of UHD (3.5 and
up). The error message printed should give the command to download and
burn the correct images.
-josh
> --n
>
>>
>> Many thanks
>>
>> --David
>>
>>
>> _______________________________________________
>> USRP-users mailing list
>> [email protected]
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
------------------------------
Message: 10
Date: Thu, 14 Feb 2013 00:37:46 +0000
From: [email protected]
To: [email protected]
Subject: Re: [USRP-users] USRP N210 revision number
Message-ID: <[email protected]>
Content-Type: text/plain; charset=US-ASCII
WOW
Now that's what I call service :-) Two answers inside 10 mins
Thanks gentlemen - it's now past midnight here - but first thing tomorrow I
shall fire up the device, knowing what to look for.
--David
On Wed, 13 Feb 2013 18:28:43 -0600
Josh Blum <[email protected]> wrote:
>
>
> On 02/13/2013 06:26 PM, Nick Foster wrote:
> > On 02/13/2013 04:17 PM, [email protected] wrote:
> >> I have to use an N210 for the first time, and I need to determine the
> >> revision number to load the correct FPGA images
> >>
> >> Unfortunately we had to buy the device via National Instruments in the
> >> UK - long story.... And so the box only has a National Instrument
> >> sticker on the back , which calls an N210 + WBX an 'NI USRP-2920' NO
> >> revision number
> >>
> >> I've looked in the box, the WBX says rev 3.0, but I can't see anything
> >> on the PCB (unless it's on the underside - don't want to totally strip
> >> it (yet))
> >>
> >> I have photographed the main chip numbers - does anyone know what
> >> changed rev 2 to 3 to 4 - or how to determine this by software. (I'm
> >> trying *not* to brick the device in my first 24h - I don't have any
> >> access to jtag kit to recover it:-)
> >>
> >> I need to load the normal ettus fpga code for gnuradio - I believe it
> >> currently holds the NI labview code
> > It's a rev 4. Thanks for asking. =)
> >
>
> Also, if you run uhd_usrp_probe from a recent version of UHD (3.5 and
> up). The error message printed should give the command to download and
> burn the correct images.
>
> -josh
>
> > --n
> >
> >>
> >> Many thanks
> >>
> >> --David
> >>
------------------------------
Message: 11
Date: Thu, 14 Feb 2013 17:51:51 +0100
From: Invizible Box <[email protected]>
To: [email protected]
Subject: [USRP-users] USRP Tx interpolation factor
Message-ID:
<cadsorv_1b_77jvcidd6rbkt-uz5o7ck7sfkn4fxsemxusca...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
Hello everyone,
I am new to the USRP world. I am working on USRP n210.
I want to implement a transmitter using simulink-matlab. I have I/Q data
saved in a file which I read into simulink and I have a sample time of 1e-6
at the ''From Workspace'' block.
I want to know how we select the interpolation factor in the sdru Tx block
and how it effects the input sample time. How will it change if i put a
buffer between the sdru tx and my source data.
Thanking in advance,
Ciao
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