FYI, I have created a “usrp_n210_r2_fpga.bit" file by adding the additional 
header to the usrp_n210_r2_fpga.bin file, renamed it, and loaded it into the 
N210’s FPGA.  Will report back on the ability to install an older version of 
UHD than the current version to see if the elderly N210 can be made to come 
alive again using rev2 firmware/fpga images.  

Joe

> On May 8, 2019, at 12:11 PM, Joe Martin via USRP-users 
> <usrp-users@lists.ettus.com> wrote:
> 
> Thanks, Robin, I’ll certainly try that!  
> 
> As I mentioned, we are amenable to running this particular N210 with an old 
> version of UHD to gain some functionality.  
> 
>> On May 8, 2019, at 12:07 PM, Robin Coxe <robin.c...@ettus.com 
>> <mailto:robin.c...@ettus.com>> wrote:
>> 
>> You might want to try this:  
>> https://forums.xilinx.com/t5/Configuration/Is-it-possible-to-convert-bin-file-to-bit-file-or-mcs-file/td-p/870351
>>  
>> <https://forums.xilinx.com/t5/Configuration/Is-it-possible-to-convert-bin-file-to-bit-file-or-mcs-file/td-p/870351>
>>    but YMMV.
>> 
>> -Robin
>> 
>> 
>> On Wed, May 8, 2019 at 11:04 AM Joe Martin <k...@k5so.com 
>> <mailto:k...@k5so.com>> wrote:
>> Very good, Marcus.  I would greatly appreciate it.
>> 
>> If we can get our hands on the “usrp_n210_r2_fpga.bit” from anywhere we 
>> could load it and install an ancient UHD version that has the associated 
>> .bin files for rev2 and run with that setup to have at least a minimal 
>> amount of utility from the N210, albeit not all the niceties and 
>> functionality of a modern UHD version.  
>> 
>> Thanks Jason, Marcus, and Robin for the information.  Much appreciated.  At 
>> least we know now what we need for this N210 and what to expect from it in 
>> terms of performance if we ever find the .bit file too.  
>> 
>> Best regards to all, 
>> 
>> Joe
>> 
>>> On May 8, 2019, at 11:30 AM, Marcus D. Leech via USRP-users 
>>> <usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:
>>> 
>>> On 05/08/2019 01:24 PM, Robin Coxe wrote:
>>>> Hi Joe and Jason.  So, I took a walk down Memory Lane and discovered that 
>>>> the N210 was first released by Ettus Research in November 2010, which was 
>>>> about 6 months after we were acquired by National Instruments.
>>>> It is a true statement that v2 of the hardware is quite geriatric and no 
>>>> longer supported in modern versions of UHD.   However, all hope is not 
>>>> lost.
>>>> 
>>>> There *is* support for N200/N210 in the oldest version of UHD that is 
>>>> still downloadable on files.ettus.com <http://files.ettus.com/>, UHD 
>>>> v.3.8.0.0.   The FPGA images are in this zip file:
>>>> http://files.ettus.com/binaries/images/uhd-images_003.008.000-18-g6647f8cc.zip
>>>>  
>>>> <http://files.ettus.com/binaries/images/uhd-images_003.008.000-18-g6647f8cc.zip>
>>>> 
>>>> We unfortunately don't have a v2 in the office to confirm that it still 
>>>> works, but you might want to take a look.  
>>>> 
>>>> -Robin
>>> I'm going to go through some old disk drives on mine from "back in the 
>>> day", and see if I have the r2 .bit files.
>>> 
>>> That can't happen until the weekend, however...
>>> 
>>> 
>>>> 
>>>> 
>>>> 
>>>> On Wed, May 8, 2019 at 10:02 AM Marcus D. Leech via USRP-users 
>>>> <usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:
>>>> On 05/08/2019 12:56 PM, Joe Martin via USRP-users wrote:
>>>>> Wow, okay; that’s disheartening.  Thanks much for the info, Jason.  Nope, 
>>>>> the Rev3 bit file doesn’t work; tried it.  I’ll see if the support email 
>>>>> adr can be of use.  
>>>>> 
>>>>> Joe
>>>>> 
>>>> There was a hardware change, as I recall, between Rev2 and Rev3 involving 
>>>> the inputs to the ADCs.
>>>> 
>>>> 
>>>>>> On May 8, 2019, at 10:44 AM, Jason Matusiak 
>>>>>> <ja...@gardettoengineering.com <mailto:ja...@gardettoengineering.com>> 
>>>>>> wrote:
>>>>>> 
>>>>>> Joe, I think you might be SOL.  If you take a look at this thread from 
>>>>>> me last year, I had no luck: 
>>>>>> http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2018-April/056223.html
>>>>>>  
>>>>>> <http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2018-April/056223.html>
>>>>>> 
>>>>>> 
>>>>>> Also, when I pinged Ettus directly, here is some info I got back from 
>>>>>> them (from two different emails in the thread):
>>>>>> "we've been having some trouble tracking down Rev2 bitfiles, because no
>>>>>> one here was around when that was built. If you're trying to unbrick
>>>>>> them, Rev3 bitfiles might be OK, but I'm not completely sure.
>>>>>> 
>>>>>> supp...@ettus.com <mailto:supp...@ettus.com> might know more by know.
>>>>>> really sorry, but those Rev2s are just so old. And all the people from
>>>>>> that era seem to be gone. Sorry, can't help you with those Rev2s."
>>>>>> 
>>>>>> From: USRP-users <usrp-users-boun...@lists.ettus.com 
>>>>>> <mailto:usrp-users-boun...@lists.ettus.com>> on behalf of Joe Martin via 
>>>>>> USRP-users <usrp-users@lists.ettus.com 
>>>>>> <mailto:usrp-users@lists.ettus.com>>
>>>>>> Sent: Wednesday, May 8, 2019 11:55 AM
>>>>>> To: Joe Martin via USRP-users
>>>>>> Subject: [USRP-users] Bringing an elderly N210 to life by loading 
>>>>>> current firmware/fpga images
>>>>>>  
>>>>>> I am trying to bring an elderly N210 r2.0 with unknown history to life 
>>>>>> by loading current UHD firmware and fpga images from a 1Gigabit ethernet 
>>>>>> connection on an AMD 2950X, 3.4GHz, 2TB SSD PC running Ubuntu 18.04 with 
>>>>>> UHD 3.14.0.HEAD-0-gd20a7ae2 software but having difficulty. 
>>>>>> 
>>>>>> Following instructions in “USRP Hardware Driver and USRP Manual: USRP2 
>>>>>> and N2x0 Series”:
>>>>>> 
>>>>>> My initial action was to load the “usrp_n210_r4_fpga.bit" file into the 
>>>>>> N210 xc3sd3400a FPGA using a Xilinx Platform Cable USB II JTAG 
>>>>>> programming cable from a Win7 PC running Xilinx ISE iMPACT, which 
>>>>>> reported “Program Succeeded” for the action.  Ethernet LEDs on the N210 
>>>>>> are variously lighted showing activity on the connection port.
>>>>>> 
>>>>>> With the N210 connected to the Linux PC 1Gbps ethernet port, issuing the 
>>>>>> following commands result in the responses shown in the screenshot image 
>>>>>> below: 
>>>>>> 
>>>>>> <Screenshot from 2019-05-08 08-46-52.png>
>>>>>> 
>>>>>> My (naive!) interpretation of the above responses is that the FPGA may 
>>>>>> not actually have been programmed with the *.bit code even though iMPACT 
>>>>>> reported success in programming.  Can someone assist me in understanding 
>>>>>> whether my interpretation is correct or not and, most importantly, 
>>>>>> suggest what I might try next to bring this N210 to life?  
>>>>>> 
>>>>>> The “Please run:” suggestion results in the “Received invalid reply 32 
>>>>>> from device” error.  It seems no matter what I try the “Received invalid 
>>>>>> reply 32 from device” RuntimeError is reported back when I try to load 
>>>>>> any new firmware/FPGA images.  
>>>>>> 
>>>>>> Thanks!
>>>>>> 
>>>>>> Joe
>>>>> 
>>>>> 
>>>>> 
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>>>> 
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