Perhaps you should also check the movw instructions on ia32, to make sure they are right, and to compare the new x64 versions to.
http://codereview.chromium.org/293023/diff/1043/65 File src/x64/assembler-x64.cc (right): http://codereview.chromium.org/293023/diff/1043/65#newcode1258 Line 1258: void Assembler::movw(Register dst, const Operand& src) { The operand-size prefix 0x66 is necessary. In this case, the top 48 bits will be unmodified. You probably want movzx and movsx. http://codereview.chromium.org/293023/diff/1043/65#newcode1270 Line 1270: emit(0x89); One of these two should be 8B. http://codereview.chromium.org/293023/diff/1043/65#newcode1457 Line 1457: The 16-bit version needs the operand-size prefix. Why isn't the 16-bit version just movsxlq plus the prefix, based on opcode 0x63? http://codereview.chromium.org/293023/diff/1043/67 File src/x64/assembler-x64.h (right): http://codereview.chromium.org/293023/diff/1043/67#newcode521 Line 521: void movl(Register dst, Register src); It wouldn't hurt to comment the block of movl, to say that all moves to a register are zero-extended to 64-bits. http://codereview.chromium.org/293023/diff/1043/64 File src/x64/macro-assembler-x64.cc (right): http://codereview.chromium.org/293023/diff/1043/64#newcode587 Line 587: return zero; Why not testq(src, src) return no_sign; http://codereview.chromium.org/293023 --~--~---------~--~----~------------~-------~--~----~ v8-dev mailing list [email protected] http://groups.google.com/group/v8-dev -~----------~----~----~----~------~----~------~--~---
