Revision: 5548
Author: [email protected]
Date: Tue Sep 28 07:56:36 2010
Log: Mark ptest instruction as requiring SSE4.1.
I also added a flag like the ones we have for other SSE versions.
Review URL: http://codereview.chromium.org/3505003
http://code.google.com/p/v8/source/detail?r=5548
Modified:
/branches/bleeding_edge/src/flag-definitions.h
/branches/bleeding_edge/src/ia32/assembler-ia32.cc
/branches/bleeding_edge/src/ia32/assembler-ia32.h
=======================================
--- /branches/bleeding_edge/src/flag-definitions.h Tue Sep 28 05:49:25 2010
+++ /branches/bleeding_edge/src/flag-definitions.h Tue Sep 28 07:56:36 2010
@@ -108,6 +108,8 @@
"enable use of SSE2 instructions if available")
DEFINE_bool(enable_sse3, true,
"enable use of SSE3 instructions if available")
+DEFINE_bool(enable_sse4_1, true,
+ "enable use of SSE4.1 instructions if available")
DEFINE_bool(enable_cmov, true,
"enable use of CMOV instruction if available")
DEFINE_bool(enable_rdtsc, true,
=======================================
--- /branches/bleeding_edge/src/ia32/assembler-ia32.cc Thu Sep 23 02:15:26
2010
+++ /branches/bleeding_edge/src/ia32/assembler-ia32.cc Tue Sep 28 07:56:36
2010
@@ -2414,7 +2414,7 @@
void Assembler::ptest(XMMRegister dst, XMMRegister src) {
- ASSERT(CpuFeatures::IsEnabled(SSE2));
+ ASSERT(CpuFeatures::IsEnabled(SSE4_1));
EnsureSpace ensure_space(this);
last_pc_ = pc_;
EMIT(0x66);
=======================================
--- /branches/bleeding_edge/src/ia32/assembler-ia32.h Fri Sep 24 01:25:31
2010
+++ /branches/bleeding_edge/src/ia32/assembler-ia32.h Tue Sep 28 07:56:36
2010
@@ -376,6 +376,7 @@
static bool IsSupported(CpuFeature f) {
if (f == SSE2 && !FLAG_enable_sse2) return false;
if (f == SSE3 && !FLAG_enable_sse3) return false;
+ if (f == SSE4_1 && !FLAG_enable_sse4_1) return false;
if (f == CMOV && !FLAG_enable_cmov) return false;
if (f == RDTSC && !FLAG_enable_rdtsc) return false;
return (supported_ & (static_cast<uint64_t>(1) << f)) != 0;
--
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