On Aug 31, 2005, at 2:39 PM, <[EMAIL PROTECTED]> wrote:
on 8/31/05 4:27 PM, John Niven at [EMAIL PROTECTED] wrote:
On Aug 31, 2005, at 11:44 AM, Jeff Walther wrote:
The pinout shows a separate data_in and data_out pin for each bit of
the SIMM. In other words, it's an eight bit SIMM, but instead of
simply having eight data pins Data[0:7] it has eight Data_In[0:7] and
eight Data_Out[0:7] pins.
The "by one bit" DRAMs had separate input and output pins. Most users
just tied them together and hooked them to a bi-directional bus. I
haven't looked into this, but I always assumed that what the IIfx did
was keep the In and Out busses separate so that the timing operations
could be overlapped thus speeding up memory operations.
That could imply that the IIfx SIMM requires bizarre dual data ported
chips, but the chip examples I've identified (thanks Bob) seem to be
normal DRAM chips.
I assume the mother board has the "bizarre dual data ported chips" so
the SIMMs are unique in NOT hooking the In and Out pins together :-)
John
Didn't IIfx RAM's have nine bits for error detection? I seem to
remember
that there was something different about them and the RAM for a IIfx
was
unique to that Mac. All other Macs of that vintage had interchangeable
RAM.
r
No. The RAM uses 8 DRAM chips. The unique thing that you remember is
that it was packaged in a 64pin SIMM (not the then customary 30pin). It
did this to allow the DRAM data inputs and outputs to be brought out
separately to the edge connector of the SIMM. This also means that a
IIfx SIMM could ONLY be made with "by one" organized DRAM's.
I don't believe ANY Mac has ever used error detection (called
"parity"). Some early PC's and servers did.
John
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