Moin,
For a project I am doing, I need a high resolution, high linearity ADC.
As it does not need to be fast, I choose to build a multi-slope ADC
à la <insert your favorite DMM>. The basic circuit I came up with is attached.
The LTC2380-24 is good for about 1µV at a +/-5V range (including noise
and INL). The two LT6018 infront of it give it a gain of 8.8 and the
integrator has a gain of 50 per ms of integration time. Input range is +/-10V.
Unless I am missing something, the noise of the whole system is dominated
by the input noise of the integrator, namely the 20k resistor that gives
a noise voltage density of ~18nV/√Hz, plus the 250nVpp low frequency
noise of the ADA4077
Assuming we use a 100ms integration time, we get an input related
resolution of 22pV. The input resistor noise over a bandwidth of 10Hz
is 57nVrms. The low frequency noise of the AD4077 is 250nVpp/3=83nVrms.
So the total noise ends up being 100nVrms or 300nVpp. Which is
about 7.8 digits or 25.9bits ENOB.
If we go to 1s integration time, the noise changes to 18nVrms and 177Vpp,
respectively. Added together this becomes 62nVrms or 185nVpp. Which in turn
is 8 digits or 26.7bits ENOB.
Now to the questions :-)
1) Is my assumption correct, that the integrator dominates the noise
in this system?
2) If I look at the documentation of the HP3458, they reach 28bits at
166ms integration time. Yet the HP Journal article talks about 100nV/√Hz
input noise. Ie the noise of the HP3458 is over a factor 5 higher, yet the
ENOB @100ms is 2 bits better. It barely matches up, when I ignore the
low frequency noise, but the factor of 5 in noise (or 2.3 bits) difference
remains. Where does this discrepancy come from?
Attila Kinali
--
<JaberWorky> The bad part of Zurich is where the degenerates
throw DARK chocolate at you.
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