Hoi Poul-Henning!
On Sat, 07 Jul 2018 19:51:36 +0000
"Poul-Henning Kamp" <[email protected]> wrote:
> I am not sure why you call your circuit a "multi-slope ADC", I can
> only see one pair of current sources ?
Ah..sorry.. because of the multi-slope run-up. In the setup I have
there is no need for the run-down due to the high resolution ADC
following the integrator. Sorry, I should have been more clear
about this.
> The trick to multislope is that it can cut down the convergence
> time, and that in turn reduces the effect of all the drift/leakage
> error sources proportionally.
The run-down is cut away completely. The LTC2380-24 takes about 1024
samples to get down to <2LSB rms error, which takes approximately 0.5ms.
I do not think that any multi-slope run-down would get to this precision
this quickly.
> I suspect you also significantly underestimate the "non-ideal
> component" source of errors.
Very likely. Though the main one that I could not properly quantify
yet are the charge injections from the switches, because....
> The trick in Fig 7/p.12 is much more important than most people
> realize and HP's implementation is significantly more interesting
> than Fig 7 lets on, because it involves 8 switches instead of two.
... I don't know how well the keep-the-number-of-switch-operations-constant
trick cancels things out. For the moment I assume that they do perfectly
cancel out to the point that the system is noise limited. The behaviour
of the switches is also the reason why I use current sources instead of
resistors and reference voltages. This way, the current sources eliminate
the error due to change of resistance through the switches. Unfortunately,
they add another error due to the jump of the current during the switch
operation. I have not yet spend enough time to quantify this error to
say anything about its magnitude.
Another source of non-ideality that I was unable to quantify so far
is the dielectric absorption of the integration capacitor. I hope that
the idea of keeping its voltage below 1V should help keeping this problem
at bay. Especially considering that the HP3458 gets away with a simple
MLCC ceramic capacitor (SA10 series 330pF from AVX) and a small compensation
circuit with a tau of 24µs (100pF+243R).
> If you want to have any dream of getting performance like HP3458,
> you will have to write a lot of code to do the same "auto"-calibrations
> as the HP3458, and you will have to run it on a regular basis to
> cope with component drift.
Yes. The idea is that the ADC runs a cycle offset+gain calibration,
7 measurements, calibration, 7 measurements,... etc pp which should
result in a cycle time of slighly less than 2s. My assumption is that
the drift of components is low enough that they change insignificantly
within those 2s. To keep the calibration measurments short is the reason
why ther are only a single positive and negative current source, and not
multiple as the HP3458 does.
> There is no free lunches after bit 20...
Oh yes... That design is the results of many weeks of reading up on
how ADCs work and how to get them accurate and precise.
Attila Kinali
--
<JaberWorky> The bad part of Zurich is where the degenerates
throw DARK chocolate at you.
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