>>> On 07.03.18 at 19:58, <andrew.coop...@citrix.com> wrote:
> --- a/xen/include/asm-x86/msr-index.h
> +++ b/xen/include/asm-x86/msr-index.h
> @@ -312,18 +312,21 @@
>  
>  #define MSR_IA32_TSC_ADJUST          0x0000003b
>  
> -#define MSR_IA32_APICBASE            0x0000001b
> -#define MSR_IA32_APICBASE_BSP                (1<<8)
> -#define MSR_IA32_APICBASE_EXTD               (1<<10)
> -#define MSR_IA32_APICBASE_ENABLE     (1<<11)
> -#define MSR_IA32_APICBASE_BASE               0x000ffffffffff000ul
> -#define MSR_IA32_APICBASE_MSR           0x800
> -#define MSR_IA32_APICTPR_MSR            0x808
> -#define MSR_IA32_APICPPR_MSR            0x80a
> -#define MSR_IA32_APICEOI_MSR            0x80b
> -#define MSR_IA32_APICTMICT_MSR          0x838
> -#define MSR_IA32_APICTMCCT_MSR          0x839
> -#define MSR_IA32_APICSELF_MSR           0x83f
> +#define MSR_APIC_BASE                   0x0000001b
> +#define APIC_BASE_BSP                   (1<<8)
> +#define APIC_BASE_EXTD                  (1<<10)
> +#define APIC_BASE_ENABLE                (1<<11)
> +#define APIC_BASE_BASE                  0x000ffffffffff000ul

This sounds a little clumsy; how about APIC_BASE_ADDR_MASK?

> +#define MSR_X2APIC_BASE                 0x800
> +#define MSR_X2APIC_LAST                 0xbff

With "LAST", perhaps also MSR_X2APIC_FIRST (even further
separating it from MSR_APIC_BASE)?

> +#define MSR_X2APIC_TPR                  0x808
> +#define MSR_X2APIC_PPR                  0x80a
> +#define MSR_X2APIC_EOI                  0x80b
> +#define MSR_X2APIC_TMICT                0x838
> +#define MSR_X2APIC_TMCCT                0x839
> +#define MSR_X2APIC_SELF                 0x83f

All surrounding MSR indexes have leading zeros spelled out; would
you mind doing so for the x2APIC ones as well?

I won't insist on any of these though, so with or without any or all
of them
Acked-by: Jan Beulich <jbeul...@suse.com>

Jan


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