> On 19 Jun 2023, at 18:01, Julien Grall <jul...@xen.org> wrote:
> 
> From: Julien Grall <jgr...@amazon.com>
> 
> Per the Arm Arm (ARM DDI 0406C.d A3.8.3):
> 
> "The DMB and DSB memory barriers affect reads and writes to the memory
> system generated by load/store instructions and data or unified cache
> maintenance operations being executed by the processor. Instruction
> fetches or accesses caused by a hardware translation table access are
> not explicit accesses."
> 
> The function switch_to_runtime_mapping() is responsible to map the
> Xen at its runtime address if we were using the temporary area before
> jumping returning using a runtime address. So we need to ensure the
> 'dsb' has completed before continuing. Therefore add an 'isb'.
> 
> Fixes: fbd9b5fb4c26 ("xen/arm32: head: Remove restriction where to load Xen")
> Signed-off-by: Julien Grall <jgr...@amazon.com>


Reviewed-by: Luca Fancellu <luca.fance...@arm.com>



Reply via email to