Hi Julien,
> On 19 Jun 2023, at 19:01, Julien Grall <jul...@xen.org> wrote:
>
> From: Julien Grall <jgr...@amazon.com>
>
> Per the Arm Arm, (Armv7 DDI406C.d A3.8.3 and Armv8 DDI 0487J.a B2.3.12):
>
> "The DMB and DSB memory barriers affect reads and writes to the memory
> system generated by load/store instructions and data or unified cache
> maintenance operations being executed by the processor. Instruction
> fetches or accesses caused by a hardware translation table access are
> not explicit accesses."
>
> Note that second sentence is not part of the newer Armv8 spec. But the
> interpretation is not much different.
>
> As the entry created by arch_pmap_map() will be used soon after
> pmap_map() returns, we want to ensure the DSB in write_pte() has
> completed. So add an ISB.
>
> Fixes: 4f17357b52f6 ("xen/arm: add Persistent Map (PMAP) infrastructure")
> Signed-off-by: Julien Grall <jgr...@amazon.com>
Reviewed-by: Bertrand Marquis <bertrand.marq...@arm.com>
Cheers
Bertrand
> ---
> xen/arch/arm/include/asm/pmap.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/xen/arch/arm/include/asm/pmap.h b/xen/arch/arm/include/asm/pmap.h
> index e094d13dd282..bca3381796f3 100644
> --- a/xen/arch/arm/include/asm/pmap.h
> +++ b/xen/arch/arm/include/asm/pmap.h
> @@ -15,6 +15,11 @@ static inline void arch_pmap_map(unsigned int slot, mfn_t
> mfn)
> pte = mfn_to_xen_entry(mfn, PAGE_HYPERVISOR_RW);
> pte.pt.table = 1;
> write_pte(entry, pte);
> + /*
> + * The new entry will be used very soon after arch_pmap_map() returns.
> + * So ensure the DSB in write_pte() has completed before continuing.
> + */
> + isb();
> }
>
> static inline void arch_pmap_unmap(unsigned int slot)
> --
> 2.40.1
>
