On 06/12/2018 08:49, Jan Beulich wrote:
>>>> + {"amd_stibp", 0x80000008, NA, CPUID_REG_EBX, 15, 1},
>>>> + {"amd_ssbd", 0x80000008, NA, CPUID_REG_EBX, 24, 1},
>>>> + {"virt_sc_ssbd", 0x80000008, NA, CPUID_REG_EBX, 25, 1},
>>>> + {"amd_ssb_no", 0x80000008, NA, CPUID_REG_EBX, 26, 1},
>>> Since you're at it, why not also introduce names for bits 16-18
>>> at this occasion?
>> I haven't previously filled in names for the sake of it.
>>
>> The reason that ibrs/stibp/ssbd are here is because they're related and
>> I've also got a followon few patches to support MSR_VIRT_SPEC_CTRL on
>> Rome hardware via MSR_SPEC_CTRL, but I need an SDP and some
>> experimentation time before I'd be happy posting them.
>>
>> But to address your question, I can't locate those bits at all. Not
>> even in the NDA docs or Linux source.
> Hmm, that's certainly odd. I've found them quite some time ago in this
> public whitepaper:
> https://developer.amd.com/wp-content/resources/Architecture_Guidelines_Update_Indirect_Branch_Control.pdf
> They're all clearly IBRS/STIBP related.
Oh - I'd completely forgotten about that whitepaper. Some of the
details are superseded by the SSBD paper.
For now, I'll drop the bit names for features not used in this series.
One way or another, doing anything with the others will require some
experimentation on hardware which supports them.
~Andrew
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