Richard Cochran wrote:
> On Thu, Apr 07, 2011 at 09:02:58PM +0200, Richard Cochran wrote:
>> On Thu, Apr 07, 2011 at 08:32:52PM +0200, Gilles Chanteperdrix wrote:
>>> I think the ixp is a 32 bits free-running counter with match register,
>>> wich is a configuration I tested. So, I would tend to think that the
>>> issue is rather in the clock_events implementation.
>> The IXP425 has one shot, count down timer (see below). Does that make
>> any difference?
>>
>> (It might be that one of the other IXPxxx chips does have a match
>> register, but not this one.)
>
> What I meant to say:
>
> Yes, the time register is a 32 bits free-running counter.
>
> But, the interrupt source is a count down register, with or without
> automatic reload.
On my side, I meant to say, the issue is in the implementation of the
I-pipe one-shot timer, the function ipipe_mach_set_dec...
--
Gilles.
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